參數(shù)資料
型號(hào)： S80C186XL25
廠商： INTEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 16-BIT, 25 MHz, MICROPROCESSOR, PQFP80
封裝： EIAJ, QFP-80
文件頁(yè)數(shù)： 46/48頁(yè)
文件大?。?/td> 762K
代理商： S80C186XL25
80C186XL80C188XL
DRAM Refresh Control Unit
The Refresh Control Unit (RCU) automatically gen-
erates DRAM refresh bus cycles The RCU operates
only in Enhanced Mode After a programmable peri-
od of time the RCU generates a memory read re-
quest to the BIU If the address generated during a
refresh bus cycle is within the range of a properly
programmed chip select that chip select will be acti-
vated when the BIU executes the refresh bus cycle
Power-Save Control
The 80C186XL when in Enhanced Mode can enter
a power saving state by internally dividing the proc-
essor clock frequency by a programmable factor
This divided frequency is also available at the
CLKOUT pin
All internal logic including the Refresh Control Unit
and the timers have their clocks slowed down by
the division factor To maintain a real time count or a
fixed DRAM refresh rate these peripherals must be
re-programmed when entering and leaving the pow-
er-save mode
Interface for 80C187 Math
Coprocessor (80C186XL Only)
In Enhanced Mode three of the mid-range memory
chip selects are redefined according to Table 1 for
use with the 80C187 The fourth chip select MCS2
functions as in compatible mode and may be pro-
grammed for activity with ready logic and wait states
accordingly As in Compatible Mode MCS2 will func-
tion for one-fourth a programmed block size
Table 1 MCS Assignments
Compatible
Enhanced Mode
Mode
MCS0
PEREQ Processor Extension Request
MCS1
ERROR NPX Error
MCS2
Mid-Range Chip Select
MCS3
NPS
Numeric Processor Select
ONCE Test Mode
To facilitate testing and inspection of devices when
fixed into a target system the 80C186XL has a test
mode available which allows all pins to be placed in
a high-impedance state ONCE stands for ‘‘ON Cir-
cuit Emulation’’ When placed in this mode the
80C186XL will put all pins in the high-impedance
state until RESET
The ONCE mode is selected by tying the UCS and
the LCS LOW during RESET These pins are sam-
pled on the low-to-high transition of the RES pin
The UCS and the LCS pins have weak internal pull-
up resistors similar to the RD and TEST BUSY pins
to guarantee ONCE Mode is not entered inadver-
tently during normal operation LCS and UCS must
be held low at least one clock after RES goes high
to guarantee entrance into ONCE Mode
7
相關(guān)PDF資料
PDF描述
S80C186XL20 16-BIT, 20 MHz, MICROPROCESSOR, PQFP80
S80C188XL20 16-BIT, 20 MHz, MICROPROCESSOR, PQFP80
S80C188XL12 16-BIT, 12 MHz, MICROPROCESSOR, PQFP80
SB80C186XL25 16-BIT, 25 MHz, MICROPROCESSOR, PQFP80
SB80C188XL25 16-BIT, 25 MHz, MICROPROCESSOR, PQFP80
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S80C188 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:CMOS High-Integration 16-Bit Microprocessors
S80C188-12 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:CMOS High-Integration 16-Bit Microprocessors
S80C188-16 制造商:AMD 制造商全稱(chēng):Advanced Micro Devices 功能描述:CMOS High-Integration 16-Bit Microprocessors
S80C188-20 制造商:Rochester Electronics LLC 功能描述:- Bulk
S80C18820BR 制造商:AMD 功能描述:*
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