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型號(hào)：	S80C154-20
廠商：	TEMIC SEMICONDUCTORS
元件分類：	微控制器/微處理器
英文描述：	8-BIT, 20 MHz, MICROCONTROLLER, PQCC44
文件頁(yè)數(shù)：	362/1021頁(yè)
文件大小：	15196K
代理商：	S80C154-20

32072H–AVR32–10/2012

AT32UC3A3

21. Serial Peripheral Interface (SPI)

Rev: 2.1.0.3

Features

Compatible with an embedded 32-bit microcontroller

Supports communication with serial external devices

– Four chip selects with external decoder support allow communication with up to 15

peripherals

– Serial memories, such as DataFlash and 3-wire EEPROMs

– Serial peripherals, such as ADCs, DACs, LCD controllers, CAN controllers and Sensors

– External co-processors

Master or Slave Serial Peripheral Bus Interface

– 4 - to 16-bit programmable data length per chip select

– Programmable phase and polarity per chip select

– Programmable transfer delays between consecutive transfers and between clock and data

per chip select

– Programmable delay between consecutive transfers

– Selectable mode fault detection

Connection to Peripheral DMA Controller channel capabilities optimizes data transfers

– One channel for the receiver, one channel for the transmitter

– Next buffer support

– Four character FIFO in reception

Overview

The Serial Peripheral Interface (SPI) circuit is a synchronous serial data link that provides com-

munication with external devices in Master or Slave mode. It also enables communication

between processors if an external processor is connected to the system.

The Serial Peripheral Interface is essentially a shift register that serially transmits data bits to

other SPIs. During a data transfer, one SPI system acts as the “master”' which controls the data

flow, while the other devices act as “slaves'' which have data shifted into and out by the master.

Different CPUs can take turn being masters (Multiple Master Protocol opposite to Single Master

Protocol where one CPU is always the master while all of the others are always slaves) and one

master may simultaneously shift data into multiple slaves. However, only one slave may drive its

output to write data back to the master at any given time.

A slave device is selected when the master asserts its NSS signal. If multiple slave devices

exist, the master generates a separate slave select signal for each slave (NPCS).

The SPI system consists of two data lines and two control lines:

Master Out Slave In (MOSI): this data line supplies the output data from the master shifted

into the input(s) of the slave(s).

Master In Slave Out (MISO): this data line supplies the output data from a slave to the input of

the master. There may be no more than one slave transmitting data during any particular

Serial Clock (SPCK): this control line is driven by the master and regulates the flow of the

data bits. The master may transmit data at a variety of baud rates; the SPCK line cycles once

for each bit that is transmitted.

Slave Select (NSS): this control line allows slaves to be turned on and off by hardware.

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
S80C154-30	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller
S80C154-36	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller
S80C154-L16	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller
S80C186	制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:CMOS High-Integration 16-Bit Microprocessors
S80C186-12	制造商:Advanced Micro Devices 功能描述:MPU 80C86 CISC 16-Bit CMOS 12MHz 80-Pin PQFP

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