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參數(shù)資料
| 型號： | S7600A |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SERIAL COMM CONTROLLER, PQFP48 |
| 封裝： | 7 X 7 X 1.4 MM, LQFP-48 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 64K |
| 代理商： | S7600A |
TCP/IP NETWORK PROTOCOL STACK LSI
S7600A Datasheet 1999/October
S-7600A
Seiko Instruments Inc.
5
68k Family MPU Mode
This mode can be selected by pulling the C86 input pin “H” and the PSX input pin “H”. In this mode, the address and data are
muxed into a single 8-bit bus. All cycles start by placing an address on the bus and setting the RS pin to “L”. In this mode WRITEX
signal works as read/write(R/WX) signal and READX is the enable (E) signal for 68k Family MPU interface. After the address cycle,
the MPU generates a read or writes strobe by setting the READX and WRITEX pins. The S-7600A MPU interface logic assert a
BUSYX signal low during data write and read phases. The MPU samples the BUSYX bit before starting a new cycle. The can
initiate a new cycle if the bit is “H”.
x80 Family MPU Mode
This mode is selected by pulling the C86 input pin “L” and the PSX input pin “H”. In this mode, the address and data are muxed
onto a single 8-bit bus. All cycles start with the address placed on the bus. This address is then latched internally on the rising edge
of WRITEX. The RS pin “L” indicates that the WRITEX strobe is for the address phase. In the next phase, data is either written or
read by generating WRITEX or READX strobe. The MPU interface logic will assert the BUSYX signal after READX or WRITEX
strobes are de-asserted.
The BUSYX signal is de-asserted after the S-7600A complete a read or writes operation. The MPU
samples the BUSYX bit before starting a new cycle. The MPU can initiate a new cycle after the BUSYX signal gets de-asserted.
Serial Interface
This mode is selected by pulling the PSX input pin “L”. In this mode Bit 6 of the Data Bus is used as the serial clock and bit 5 and
7 are used as Data Input and Data Output. Bit 0 to 4 are high impedance. By pulling WRITEX signal to “H” or “L”, the MPU performs
a read or write operation.
Interrupt
The interrupt signal outputs an active level while the interrupt flag is set in the interrupt register in the S-7600A’s interrupt register.
The interrupt signal returns to an inactive level if the flag clears.
The INT1 and INT2X can be Open Drain or CMOS output depending on the setting of INTCTL. The INT1 and INT2X outputs are
CMOS if INTCTL is “H” otherwise outputs are Open Drain. Table 7 defines the interrupt selection.
Table 7
Interrupt Selection
Interrupt flag
INTCTL
INT1
INT2X
Set
H
L
Set
H
L
Reset
H
L
H
Reset
L
Hi-Z
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-7600A | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TCP/IP PROTOCOL STK RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| S760BK | 功能描述:直流電源連接器 LOCKING MINI PWR PLG WHITE 0.080" 2.0mm RoHS:否 制造商:Kycon 產(chǎn)品:Receptacles 觸點(diǎn)內(nèi)徑: 觸點(diǎn)外徑: 中心腳長度: 電流額定值:7.5 A 電壓額定值:20 V 安裝角:Right 安裝風(fēng)格:Cable |
| S760BK-1MTR | 制造商:Switchcraft 功能描述:Locking 2.0mm DC Power Plug Cable 1m |
| S760K | 功能描述:直流電源連接器 DC PWR PLG 0.080" 1.7"L, BLK HAND. LCK RoHS:否 制造商:Kycon 產(chǎn)品:Receptacles 觸點(diǎn)內(nèi)徑: 觸點(diǎn)外徑: 中心腳長度: 電流額定值:7.5 A 電壓額定值:20 V 安裝角:Right 安裝風(fēng)格:Cable |
| S760K | 制造商:Switchcraft 功能描述:JACK PLUG DC |
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