
134
Mobile SDRAM Type 1
SDRAM_01_A3 November 8, 2005
P r e l i m i n a r y
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Figure 47.8.
Write with Auto Precharge Interrupted by a Read
Figure 47.9.
Write with Auto Precharge Interrupted by a Write
DON’T CARE
CLK
DQ
T2
T1
T4
T3
T6
T5
T0
COMMAND
WBANK n
NOP
NOP
NOP
NOP
D
IN
a + 1
D
IN
a
NOP
NOP
T7
BANK n
BANK m
ADDRESS
BANK n,
COL a
BANK m,
COL d
BANK m
Internal
States
t
Page Active
WRITE with Burst of 4
Interrupt Burst, Write-Back Precharge
Page Active
READ with Burst of 4
t
tRP - BANKm
D
OUT
d
D
OUT
d + 1
CAS Latency = 3 (BANK m)
RP - BANK n
WR - BANK
DON’T CARE
CLK
DQ
T2
T1
T4
T3
T6
T5
T0
COMMAND
WRITE - AP
BANK n
NOP
NOP
NOP
NOP
D
IN
d + 1
D
IN
d
D
IN
a + 1
D
IN
a + 2
D
IN
a
D
IN
d + 2
D
IN
d + 3
NOP
T7
BANK n
BANK m
ADDRESS
NOP
BCOL a
BCOL d
WRITE - AP
BANK m
Internal
States
t
Page Active
WRITE with Burst of 4
Interrupt Burst, Write-Back
Precharge
Page Active
WRITE with Burst of 4
Write-Back
WR - BANK n
tRP - BANK n
tWR - BANK m