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參數(shù)資料
| 型號： | S71WS512ND0BFWE73 |
| 廠商： | SPANSION LLC |
| 元件分類： | 存儲器 |
| 英文描述： | Stacked Multi-Chip Product (MCP) |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA84 |
| 封裝： | 12 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-84 |
| 文件頁數(shù)： | 48/188頁 |
| 文件大?。?/td> | 2252K |
| 代理商： | S71WS512ND0BFWE73 |
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46
S71WS-Nx0 Based MCPs
S71WS-N_01_A4 September 15, 2005
A d v a n c e I n f o r m a t i o n
/* Example: Unlock Bypass Entry Command */
*( (UINT16 *)bank_addr + 0x555 ) = 0x00AA; /* write unlock cycle 1 */
*( (UINT16 *)bank_addr + 0x2AA ) = 0x0055; /* write unlock cycle 2 */
*( (UINT16 *)bank_addr + 0x555 ) = 0x0020; /* write unlock bypass command */
/* At this point, programming only takes two write cycles. */
/* Once you enter Unlock Bypass Mode, do a series of like */
/* operations (programming or sector erase) and then exit */
/* Unlock Bypass Mode before beginning a different type of */
/* operations. */
/* Example: Unlock Bypass Program Command */
/* Do while in Unlock Bypass Entry Mode! */
*( (UINT16 *)bank_addr + 0x555 ) = 0x00A0; /* write program setup command */
*( (UINT16 *)pa ) = data; /* write data to be programmed */
/* Poll until done or error. */
/* If done and more to program, */
/* do above two cycles again. */
/* Example: Unlock Bypass Exit Command */
*( (UINT16 *)base_addr + 0x000 ) = 0x0090;
*( (UINT16 *)base_addr + 0x000 ) = 0x0000;
10.5.9
W rite Operation Status
The device provides several bits to determine the status of a program or erase operation. The
following subsections describe the function of DQ1, DQ2, DQ3, DQ5, DQ6, and DQ7.
DQ7: Data# Polling.
The Data# Polling bit, DQ7, indicates to the host system whether an Em-
bedded Program or Erase algorithm is in progress or completed, or whether a bank is in Erase
Suspend. Data# Polling is valid after the rising edge of the final WE# pulse in the command se-
quence. Note that the Data# Polling is valid only for the last word being programmed in the write-
buffer-page during Write Buffer Programming. Reading Data# Polling status on any word other
than the last word to be programmed in the write-buffer-page returns false status information.
During the Embedded Program algorithm, the device outputs on DQ7 the complement of the
datum programmed to DQ7. This DQ7 status also applies to programming during Erase Suspend.
When the Embedded Program algorithm is complete, the device outputs the datum programmed
to DQ7. The system must provide the program address to read valid status information on DQ7.
If a program address falls within a protected sector, Data# polling on DQ7 is active for approxi-
mately t
PSP
, then that bank returns to the read mode.
During the Embedded Erase Algorithm, Data# polling produces a “0” on DQ7. When the Embed-
ded Erase algorithm is complete, or if the bank enters the Erase Suspend mode, Data# Polling
produces a “1” on DQ7. The system must provide an address within any of the sectors selected
for erasure to read valid status information on DQ7.
After an erase command sequence is written, if all sectors selected for erasing are protected,
Data# Polling on DQ7 is active for approximately t
ASP
, then the bank returns to the read mode.
If not all selected sectors are protected, the Embedded Erase algorithm erases the unprotected
sectors, and ignores the selected sectors that are protected. However, if the system reads DQ7
at an address within a protected sector, the status may not be valid.
Cycle
Description
Operation
Byte Address
Word Address
Data
1
Program Setup Command
Write
Base + xxxh
Base + xxxh
00A0h
2
Program Command
Write
Program Address
Program Address
Program Data
Cycle
Description
Operation
Byte Address
Word Address
Data
1
Reset Cycle 1
Write
Base + xxxh
Base + xxxh
0090h
2
Reset Cycle 2
Write
Base + xxxh
Base + xxxh
0000h
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| S71WS512ND0BFWY20 | Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWY22 | Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWY23 | Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWY30 | Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWY32 | Stacked Multi-Chip Product (MCP) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S71WS512ND0BFWEJ0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWEJ2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWEJ3 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWEK0 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
| S71WS512ND0BFWEK2 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) |
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