參數(shù)資料
型號: S71PL129JA0BFI9U2
廠商: Spansion Inc.
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory
中文描述: 堆疊式多芯片產(chǎn)品(MCP)的快閃記憶體
文件頁數(shù): 123/149頁
文件大小: 2693K
代理商: S71PL129JA0BFI9U2
June 25, 2004 pSRAM_Type02_15A1
Type 2 pSRAM
123
A d v a n c e I n f o r m a t i o n
64M pSRAM
Notes:
1.
Standby mode is supposed to be set up after at least one active operation after power up. ISB1 is measure after 60ms from
the time when standby mode is set up.
128M pSRAM
Notes:
1.
Standby mode is supposed to be set up after at least one active operation after power up. I
SB1
is measured after 60ms from
the time when standby mode is set up.
Item
Symbol
Test Conditions
Min Typ
Max
Unit
Average Operating
Current
I
CC1
Cycle time= 1μs, 100% duty, I
IO
= 0mA,
CS1#
0.2V, LB#
0.2V and/or UB#
0.2V,
CS2
V
CC
-0.2V, V
IN
0.2V or V
IN
VCC-0.2V
TBD
mA
I
CC2
Async
Cycle time= Min, I
IO
= 0mA, 100% duty,
CS1#= V
IL
, CS2= V
IH
LB#= V
IL
and/or UB#= V
IL
,
V
IN
= V
IH
or V
IL
TBD
mA
Page
Cycle time= t
RC
+ 3t
PC
, I
IO
= 0mA, 100% duty,
CS1#= V
IL
, CS2= V
IH
LB#= V
IL
and/or UB#= V
IL
,
V
IN
-V
IH
or V
IL
TBD
mA
Standby Current (CMOS)
I
SB1
(Note 1)
Other inputs= 0-VCC
1. CS1#
V
CC
- 0.2, CS2
V
CC
- 0.2V (CS1#
controlled) or
2. 0V
CS2
0.2V (CS2 controlled)
TBD
mA
Item
Symbol
Test Conditions
Min Typ
Max
Unit
Average Operating
Current
I
CC1
Cycle time= 1μs, 100% duty, I
IO
= 0mA, CS1#
0.2V,
LB#
0.2V and/or UB#
0.2V, CS2
V
CC
-0.2V, V
IN
0.2V or
V
IN
VCC-0.2V
TBD
mA
I
CC2
Cycle time= t
RC
+ 3t
PC
, I
IO
= 0mA, 100% duty, CS1#= V
IL
,
CS2= V
IH
LB#= V
IL
and/or UB#= V
IL
, V
IN
-V
IH
or V
IL
TBD
mA
Standby Current (CMOS) I
SB1
(Note 1)
Other inputs= 0-V
CC
1. CS1#
V
CC
- 0.2, CS2
V
CC
- 0.2V (CS1# controlled) or
2. 0V
CS2
0.2V (CS2 controlled)
TBD
mA
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