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參數資料
| 型號： | S71AL016D |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| 中文描述： | 堆疊式多芯片產品（MCP）的閃存和RAM |
| 文件頁數： | 61/76頁 |
| 文件大小： | 909K |
| 代理商： | S71AL016D |
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August 4, 2004 SRAM_Type01_03A0
2Mbit Type 1 SRAM
61
P r e l i m i n a r y
Operating Characteristics (Over Specified Temperature Range)
Notes:
1. Typical values are measured at V
CC
= V
CC
Typ., T
A
= 25°C and is not 100% tested.
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to
drive output capacitance expected in the actual system.
3. This device assumes a standby mode if the chip is disabled (CE1# high or CE2 low). In order to achieve low standby current
all inputs must be within 0.2 volts of either V
CC
or V
SS
.
Item
Symbol
Test Conditions
Min
Type
(Note1)
Max
Unit
Supply Voltage
V
CC
2.3
3.0
3.6
V
Data Retention Voltage
V
DR
Chip Disabled (Note 3)
1.8
3.6
Input High Voltage
V
IH
1.8
V
CC
+ 0.3
Input Low Voltage
V
IL
-0.3
0.6
Output High Voltage
V
OH
IOH = 0.2mA
V
CC
- 0.2
Output Low Voltage
V
OL
IOL = -0.2mA
0.2
Input Leakage Current
I
LI
V
IN
= 0 to VCC
0.5
μA
Output Leakage Current
I
LO
OE# = V
IH
or Chip Disabled
0.5
Read/Write Operating Supply Current
at 1 μs Cycle Time (Note 2)
I
CC1
V
CC
= 3.6 V, V
IN
= V
IH
or V
IL
Chip Enabled, I
OUT
= 0
2.0
4.0
mA
Read/Write Operating Supply Current
at 70 ns Cycle Time (Note 2)
I
CC2
V
CC
= 3.6 V, V
IN
= V
IH
or V
IL
Chip Enabled, I
OUT
= 0
12.0
16.0
Page Mode Operating Supply Current
at 70ns Cycle Time (Note 2) (Figure 1)
I
CC3
V
CC
= 3.6 V, V
IN
= V
IH
or V
IL
Chip Enabled, I
OUT
= 0
4.0
Read/Write Quiescent Operating
Supply Current (Note 3)
I
CC4
V
CC
= 3.6 V, V
IN
=V
IH
or V
IL
Chip Enabled, I
OUT
= 0, f = 0
3.0
Maximum Standby Current (Note 3)
I
SB1
V
IN
= V
CC
or 0V Chip Disabled
t
A
= 85°C, V
CC
= 3.6 V
2.0
20.0
μ
Α
Maximum Data Retention Current
(Note 3)
I
DR
V
CC
= 1.8V, V
IN
= V
CC
or 0
Chip Disabled, t
A
= 85°C
10.0
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