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| 型號(hào)： | S71AL016D02-T7 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| 中文描述： | 堆疊式多芯片產(chǎn)品（MCP）的閃存和RAM |
| 文件頁(yè)數(shù)： | 15/76頁(yè) |
| 文件大小： | 909K |
| 代理商： | S71AL016D02-T7 |
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August 4, 2004 S29AL016D_00_A1_E
S29AL016D
15
A d v a n c e I n f o r m a t i o n
Device Bus Operations
This section describes the requirements and use of the device bus operations,
which are initiated through the internal command register. The command register
itself does not occupy any addressable memory location. The register is com-
posed of latches that store the commands, along with the address and data
information needed to execute the command. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the
function of the device. Table
1
lists the device bus operations, the inputs and con-
trol levels they require, and the resulting output. The following subsections
describe each of these operations in further detail.
Table 1. S29AL016D Device Bus Operations
Legend:
L = Logic Low = V
IL
, H = Logic High = V
IH
, V
ID
= 12.0
±
0.5 V, X = Don’t Care, A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out
Notes:
1. Addresses are A19:A0 in word mode (BYTE# = V
IH
), A19:A-1 in byte mode (BYTE# = V
IL
).
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See the
“Sector Protection/Unprotection” section.
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O pins DQ15–DQ0 operate in
the byte or word configuration. If the BYTE# pin is set at logic ‘1’, the device is in
word configuration, DQ15–DQ0 are active and controlled by CE# and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte configuration, and only
data I/O pins DQ0–DQ7 are active and controlled by CE# and OE#. The data I/
O pins DQ8–DQ14 are tri-stated, and the DQ15 pin is used as an input for the
LSB (A-1) address function.
Requirements for Reading Array Data
To read array data from the outputs, the system must drive the CE# and OE# pins
to V
IL
. CE# is the power control and selects the device. OE# is the output control
Operation
CE#
L
L
V
CC
±
0.3 V
L
X
OE# WE# RESET#
L
H
H
L
Addresses
(Note 1)
A
IN
A
IN
DQ0–
DQ7
D
OUT
D
IN
DQ8–DQ15
BYTE#
= V
IH
D
OUT
D
IN
BYTE#
= V
IL
Read
Write
H
H
DQ8–DQ14 = High-Z,
DQ15 = A-1
Standby
X
X
V
CC
±
0.3 V
H
L
X
High-Z
High-Z
High-Z
Output Disable
Reset
H
X
H
X
X
X
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
Sector Protect (Note 2)
L
H
L
V
ID
Sector Address,
A6 = L, A1 = H,
A0 = L
Sector Address,
A6 = H, A1 = H,
A0 = L
D
IN
X
X
Sector Unprotect (Note 2)
L
H
L
V
ID
D
IN
X
X
Temporary Sector
Unprotect
X
X
X
V
ID
A
IN
D
IN
D
IN
High-Z
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| S71AL016D02-TF | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016M | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71AL016M40 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Product (MCP) Flash Memory and RAM |
| S71CR-2-L | 制造商:Birtcher Products 功能描述: |
| S71CR-2RBL | 制造商:EG & G Birtcher 功能描述: |
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