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參數(shù)資料
| 型號： | S6B1741 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 128 SEG / 129 COM DRIVER %26 CONTROLLER FOR 4 GRAY SCALE STN LCD |
| 中文描述： | 賽格128/129 COM驅(qū)動程序及4級灰度STN液晶顯示控制器 |
| 文件頁數(shù)： | 15/78頁 |
| 文件大小： | 472K |
| 代理商： | S6B1741 |
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128SEG/129COM DRIVER & CONTROLLER FOR STN LCD
S6B1741
11
MICROPROCESSOR INTERFACE
Table 6. Microprocessor Interface Pin Description
Name
RESETB
I/O
I
Description
Reset input pin
When RESETB is "L", initialization is executed.
Parallel/Serial data input select input
PS0
Interface mode
H
Parallel
PS0
I
Data/instruction
RS
Data
Read/Write
E_RD
RW_WR
Write only
Serial clock
–
DB0 to DB7
L
Serial
RS or None
SID (DB7)
SCLK (DB6)
NOTE:
In serial mode, it is impossible to read data from the on-chip RAM. And DB0 to DB5 are
high impedance and E_RD and RW_WR must be fixed to either "H" or "L".
Microprocessor interface select input pin
PS0 = "H", PS1= "H": 6800-series parallel MPU interface
PS0 = "H", PS1= "L": 8080-series parallel MPU interface
PS0 = "L", PS1 = "H": 4 pin-SPI MPU interface
PS0 = "L", PS1 = "L": 3 pin-SPI MPU interface
Chip select input pins
Data/instruction I/O is enabled only when CSB is "L". When chip select is non-active, DB0
to DB7 may be high impedance.
Register select input pin
RS = "H": DB0 to DB7 are display data
RS = "L": DB0 to DB7 are control data
Read/Write execution control pin
C68
MPU type
RW_WR
H
6800-series
RW
Read/Write control input pin
RW = "H": read
RW = "L" : write
L
8080-series
/WR
Write enable clock input pin
The data on DB0 to DB7 are latched at the rising edge of
the /WR signal.
Read/Write execution control pin
PS1
MPU Type
E_RD
H
6800-series
E
Read/Write control input pin
RW = "H": When E is "H", DB0 to DB7 are in an
output status.
RW = "L": The data on DB0 to DB7 are latched at
the falling edge of the E signal.
L
8080-series
/RD
Read enable clock input pin
When /RD is "L", DB0 to DB7 are in an output status.
8-bit bi-directional data bus that is connected to the standard 8-bit microprocessor data bus.
When the serial interface selected (PS0 = "L");
DB0 to DB5: high impedance
DB6: serial input clock (SCLK)
DB7: serial input data (SID)
When chip select is not active, DB0 to DB7 may be high impedance.
PS1
I
CSB
I
RS
I
Description
RW_WR
I
Description
E_RD
I
DB0
to
DB7
I/O
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| S6B2086X01-T0RA | 制造商:Samsung SDI 功能描述:Q# AG2086 |
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