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參數(shù)資料
| 型號： | S6A0094 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 80 SEG / 34 COM DRIVER & CONTROLLER FOR STN LCD |
| 中文描述： | 80賽格/ 34 COM驅(qū)動程序 |
| 文件頁數(shù)： | 16/62頁 |
| 文件大?。?/td> | 745K |
| 代理商： | S6A0094 |
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S6A0094
80 SEG / 34 COM DRIVER & CONTROLLER FOR STN LCD
12
Interface with MPU in Serial Mode (PS = "Low")
When PS input pin is "Low", clock synchronized serial interface mode is selected. At this time, four ports, SCL
(DB6, synchronizing transfer clock), SI (DB7, serial input data), RS (register selection input) and CSB (chip
selection input) are used.
By setting CSB to "Low", S6A0094 can receive SCL input. If CSB is set to "High", S6A0094 resets the internal 8-
bit shift register and 3-bit counter. Serial data is input in the order of "D7, D6, D5, D4, D3, D2, D1, D0" from the
serial data input pin (SI = DB7) at the rising edge of serial clock (SCL = DB6).
At the rising edge of the 8th serial clock, the serial data (D7-D0) is converted into 8 bit bus mode data. The RS
input of the DR/IR selection is latched at the rising edge of the 8th serial clock (SCL).
In serial mode, the read is not possible.
RS
SCL (DB6)
SI (DB7)
CSB
D7
D6
D5
D4
D3
D2
D1
D0
D7
1
2
3
4
5
6
7
8
9
Figure 7. Timing Diagram of Serial Data Transfer
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