
40 SEG / 16 COM DRIVER & CONTROLLER FOR DOT MATRIX LCD
S6A0069
7
FUNCTION DESCRIPTION
System Interface
This chip has all two kinds of interface type with MPU : 4-bit bus and 8-bit bus. 4-bit bus and 8-bit bus is selected
by DL bit in the instruction register. During read or write operation, two 8-bit registers are used. one is data
register (DR), the other is instruction register(IR). The data register(DR) is used as temporary data storage place
for being written into or read from DDRAM/CGRAM. The target RAM is selected by RAM address setting
instruction. Each internal operation, reading from or writing into RAM, is done automatically. So to speak, after
MPU reads DR data, the data in the next DDRAM/CGRAM address is transferred into DR automatically. Also
after MPU writes data to DR, the data in DR is transferred into DDRAM/CGRAM automatically. The instruction
register (IR) is used only to store instruction code transferred from MPU. MPU cannot use it to read instruction
data. To select register, use RS input pin in 4-bit/8-bit bus mode.
Table 1. Various Kinds of Operations according to RS and R/W Bits
RS
R/W
Operation
L
Instruction Write operation (MPU writes Instruction code into IR)
L
H
Read Busy Flag (DB7) and address counter (DB0 - DB6)
H
L
Data Write operation (MPU writes data into DR)
H
Data Read operation (MPU reads data from DR)
Busy Flag (BF)
When BF = "High", it indicates that the internal operation is being processed. So during this time the next
instruction cannot be accepted. BF can be read, when RS = Low and R/W = High (Read Instruction Operation),
through DB7 port. Before executing the next instruction, be sure that BF is not High.
Address Counter (AC)
Address Counter(AC) stores DDRAM/CGRAM address, transferred from IR. After writing into (reading from)
DDRAM/CGRAM, AC is automatically increased (decreased) by 1. When RS = "Low" and R/W = "High", AC can
be read through DB0 - DB6 ports.