參數(shù)資料
型號: S494
廠商: AUK Corp
英文描述: Pulse Width Modulation
中文描述: 脈寬調(diào)制
文件頁數(shù): 5/8頁
文件大小: 339K
代理商: S494
KSI-K003-000
5
S494
INFORMATION
The basic oscillator(switching)frequency is controlled by an external resistor (Rt) and
capacitor(Ct). The relationship between the values of Rt Ct and frequency is shown in.
The level of the sawtooth wave form is compared with an error voltage by the pulse width
modulated comparator. The output of the PWM Comparator directs the pulse steering flip
flop and the output control logic.
The error voltage is generated by the error amplifier. The error amplifier boosts the voltage
difference between the output and the 5V internal reference. See Figure7 for error amp
sensing techniques. The second error amp is typically used to implement current limiting.
The output control logic (Pin13) selects either push-pull or single-ended operation of the
output transistors (see Figure6). The dead time control prevents on-state overlap of the
output transistors as can be seen is Figure5. The dead time is approximately 3 to 5% of the
total period if the dead time control(pin4) is grounded. This dead time can be increased by
connecting the dead time control to a voltage up to 5 V. The frequency response of the
error amps can be modified by using external resistors and capacitors. These components
are typically connected between the compensation terminal (pin3) and the inverting input
of the error amps(pin2 or pin15). The switching frequency of two or more S494 circuits can
be synchronized. The timing capacitor, Ct is connected as shown in Figure8. Charging
current is provided by the master circuit. Discharging is through all the circuits slaved to
the master. Rt is required only for the master circuit.
Operating Waveform
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