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Chapter 14 Serial Peripheral Interface (SPIV3)
MC9S12HZ256 Data Sheet, Rev. 2.05
Freescale Semiconductor
427
NOTE
In slave mode of SPI S-clock speed DIV2 is not supported.
100111
1280
19.53 kHz
101000
12
2.08333 MHz
101001
24
1.04167 MHz
101010
48
520.83 kHz
101011
96
260.42 kHz
101100
192
130.21 kHz
101101
384
65.10 kHz
101110
768
32.55 kHz
101111
1536
16.28 kHz
110000
14
1.78571 MHz
110001
28
892.86 kHz
110010
56
446.43 kHz
110011
112
223.21 kHz
110100
224
111.61 kHz
110101
448
55.80 kHz
110110
896
27.90 kHz
110111
1792
13.95 kHz
111000
16
1.5625 MHz
111001
32
781.25 kHz
111010
64
390.63 kHz
111011
128
195.31 kHz
111100
256
97.66 kHz
111101
512
48.83 kHz
111110
1024
24.41 kHz
111111
2048
12.21 kHz
Table 14-7. Example SPI Baud Rate Selection (25 MHz Bus Clock) (continued)
SPPR2
SPPR1
SPPR0
SPR2
SPR1
SPR0
Baud Rate
Divisor
Baud Rate