
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
3
S3029 TO WAC-413 AND 3.3V OPTICAL MODULE APPLICATIONS NOTE
Parts list
The following is a parts list that is a recommendation to the designer to implement the circuit in Figure 1.
QTY
Part # or equivalent
Description
2
2
19
18
2
10
4
1
1
4
Resistor, 51, 10%, 1/8W, 805 or 603 package size
Resistor, 91, 10%, 1/8W, 805 or 603 package size
Resistor, 100, 10%, 1/8W, 805 or 603 package size
Resistor, 400, 10%, 1/8W, 805 or 603 package size
Resistor, 62, 10%, 1/8W, 805 or 603 package size
Resistor, 94, 10%, 1/8W, 805 or 603 package size
Resistor, 200, 10%, 1/8W, 805 or 603 package size
IGT WAC-413 Quad 155 Mbs SONET/SDH ATM UNI Processor
AMCC S3029 Quad 155 Mbs SONET/SDH CRU
Siemens 3.3V 1x9 F/O Transceiver
WAC-413
S3029
V23809-C8-C10
Theory of Operation
1.
The S3029 extracts the clock and re-times the data from the four received differential data channels coming from
the four optical module outputs (RxD/RxDn*) when the SD* signal is High. The SD* signal when Low, indicates
loss of received optical power, therefore, the data on the Serial Data In (SERDATIP/N) pins will be internally forced
to a constant zero, LOCKDET* forced low, and the PLL forced to lock to the REFCLKP/N input.
2.
The S3029 receives four STS-3/STM-1 scrambled NRZ signals on the SERDATIP/N* inputs and recovers the
clock from the data.
3.
The S3029 outputs the recovered clock (SERCLKOP/N*), re-timed data (SERDATOP/N*), a Lock Detect
(LOCKDET*) signal, and a Transmit clock Out (TXCLKOP/N) to the WAC-413 processor for each of the 4 channels
4.
The LOCKDET* signal when High indicates that the PLL is locked to the incoming data stream.
5.
The TXCLKOP/N output signal is a 155 MHz clock that is used by the WAC-413 as a clock source for the transmitter
logic.
6.
The *TS_SERDATA+/- output from the WAC-413 to each of the optical modules is the transmit serial clock data.