參數(shù)資料
型號(hào)： S29PL127J
廠商： Spansion Inc.
英文描述： CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control
中文描述： 3.0伏的CMOS只，同步讀/寫(xiě)閃存與增強(qiáng)VersatileIO控制記憶
文件頁(yè)數(shù)： 77/106頁(yè)
文件大?。?/td> 1997K
代理商： S29PL127J
April 7, 200531107A62
S29PL127J/S29PL129J/S29PL064J/S29PL032J
75
P R E L I M I N A R Y
After an erase command sequence is written, if all sectors selected for erasing
are protected, Data# Polling on DQ7 is active for approximately 400 μs, then the
bank returns to the read mode. If not all selected sectors are protected, the Em-
bedded Erase algorithm erases the unprotected sectors, and ignores the selected
sectors that are protected. However, if the system reads DQ7 at an address within
a protected sector, the status may not be valid.
When the system detects DQ7 has changed from the complement to true data,
it can read valid data at DQ15–DQ0 on the
following
read cycles. Just prior to the
completion of an Embedded Program or Erase operation, DQ7 may change asyn-
chronously with DQ15–DQ0 while Output Enable (OE#) is asserted low. That is,
the device may change from providing status information to valid data on DQ7.
Depending on when the system samples the DQ7 output, it may read the status
or valid data. Even if the device has completed the program or erase operation
and DQ7 has valid data, the data outputs on DQ15–DQ0 may be still invalid. Valid
data on DQ15–DQ0 will appear on successive read cycles.
Table 23
shows the outputs for Data# Polling on DQ7. 6 shows the Data# Polling
algorithm. 18 in the "
AC Characteristic
" section section shows the Data# Polling
timing diagram.
Notes:
1. VA = Valid address for programming. During a sector erase operation, a valid address is
any sector address within the sector being erased. During chip erase, a valid address is
any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simultaneously
with DQ5.
Figure 6.
Data# Polling Algorithm
DQ7 = Data
Yes
No
No
DQ5 = 1
No
Yes
Yes
FAIL
PASS
Read DQ7–DQ0
Addr = VA
Read DQ7–DQ0
Addr = VA
DQ7 = Data
START
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