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參數(shù)資料
| 型號： | S29NS512P0SBJW000 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 32M X 16 FLASH 1.8V PROM, 80 ns, PBGA64 |
| 封裝： | 8 X 9.20 MM, LEAD FREE, TFBGA-64 |
| 文件頁數(shù)： | 71/86頁 |
| 文件大?。?/td> | 2234K |
| 代理商： | S29NS512P0SBJW000 |
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February 20, 2007 S29NS-P_00_A1
S29NS-P MirrorBit
TM
Flash Family
71
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
Figure 10.11
Reset Timings
10.8.4
Erase/Program Timing
Notes
1. Not 100% tested.
2. In asynchronous operation timing, addresses are latched on the rising edge of AVD#.
3. See the
Erase and Programming Performance
section for more information. Does not include the preprogramming time.
RESET#
t
RPH
t
RP
CE#, OE#
t
RH
Table 10.9
Erase/Program Timing
Parameter
Description
66
MHz
83
MHz
108
MHz
Unit
JEDEC
Standard
t
AVAV
t
WC
Write Cycle Time
(1)
Min
60
ns
t
AVWL
t
AS
Address Setup Time
(2)
Synchronous
Min
4
ns
Asynchronous
4
ns
t
WLAX
t
AH
Address Hold Time
(2)
Synchronous
Min
3.5
Asynchronous
3.5
t
AVDP
AVD# Low Time
Min
6
ns
t
DVWH
t
DS
Data Setup Time
Min
20
ns
t
WHDX
t
DH
Data Hold Time
Min
0
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
Min
0
ns
t
CAS
CE# Setup Time to AVD#
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
25
ns
t
WHWL
t
WPH
Write Pulse Width High
Min
20
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
VID
V
PP
Rise and Fall Time
Min
500
ns
t
VIDS
V
PP
Setup Time (During Accelerated Programming)
Min
1
μs
t
ELWL
t
CS
CE# Setup Time to WE#
Min
4
ns
t
AVSW
AVD# Setup Time to WE#
Min
6
ns
t
AVHW
AVD# Hold Time to WE#
Min
4
ns
t
SEA
Sector Erase Accept Time out
Min
50
μs
t
ESL
Erase Suspend Latency
Min
20
μs
t
PSL
Program Suspend Latency
Min
20
μs
t
ASP
Toggle Time During Erase within a Protected Sector
Typ
280
μs
t
PSP
Toggle Time During Programming Within a Protected Sector
Typ
1
μs
t
ERS
Erase Resume to Erase Suspend
Min
30
μs
t
PRS
Program Resume to Program Suspend
Min
30
μs
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|---|---|
| S29NS512P0SBJW003 | MirrorBit Flash Family |
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| S29PL127N65GFWW02 | 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| S29NS512P0SBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29NS512PABBJW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29NS512PABBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29NS-J | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
| S29NS-J_07 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Burst Mode Flash Memories |
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