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S29JL032H
S29JL032H_00A11 March 10, 2005
Advan ce
In form ati o n
Table 13. S29JL032H Command Definitions
Command
Sequence
Cyc
le
s
First
Second
Third
Fourth
Fifth
Sixth
Addr Data Addr Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
1
RA
RD
1
XXX
F0
Au
to
se
le
ct
Manufacturer ID
Word
4
555
AA
2AA
55
(BA)555
90
(BA)X00
01
Byte
AAA
555
(BA)AAA
Word
6
555
AA
2AA
55
(BA)555
90
(BA)X01
See
(BA)X0E
See
(BA)X0F
See
Byte
AAA
555
(BA)AAA
(BA)X02
(BA)X1C
(BA)X1E
SecSi Sector Factory
Word
4
555
AA
2AA
55
(BA)555
90
(BA)X03
82/
02
Byte
AAA
555
(BA)AAA
(BA)X06
Sector/Sector Block
Protect Verify
Word
4
555
AA
2AA
55
(BA)555
90
(SA)X02
00/
01
Byte
AAA
555
(BA)AAA
(SA)X04
Enter SecSi Sector Region
Word
3
555
AA
2AA
55
555
88
Byte
AAA
555
AAA
Exit SecSi Sector Region
Word
4
555
AA
2AA
55
555
90
XXX
00
Byte
AAA
555
AAA
Program
Word
4
555
AA
2AA
55
555
A0
PA
PD
Byte
AAA
555
AAA
Unlock Bypass
Word
3
555
AA
2AA
55
555
20
Byte
AAA
555
AAA
2
XXX
A0
PA
PD
2
XXX
90
XXX
00
Chip Erase
Word
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Byte
AAA
555
AAA
555
AAA
Sector Erase
Word
6
555
AA
2AA
55
555
80
555
AA
2AA
55
SA
30
Byte
AAA
555
AAA
555
1
BA
B0
1
BA
30
Word
1
55
98
Byte
AA
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse, whichever happens
later.
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A20–A12 uniquely select any sector. Refer to
tables 3 and 4 for information on sector addresses. BA = Address of the bank that is being switched to autoselect mode, is
in bypass mode, or is being erased. A20–A18 uniquely select a bank.
Notes:
1. See Table 1 for description of bus operations. 2. All values are in hexadecimal.
3. Except for the read cycle and the fourth, fifth, and sixth cycle of
the autoselect command sequence, all bus cycles are write
cycles.
4. Data bits DQ15–DQ8 are don’t care in command sequences,
except for RD and PD.
5. Unless otherwise noted, address bits A20–A11 are don’t cares for
unlock and command cycles, unless SA or PA is required.
6. No unlock or command cycles required when bank is reading
array data.
7. The Reset command is required to return to the read mode (or to
the erase-suspend-read mode if previously in Erase Suspend)
when a bank is in the autoselect mode, or if DQ5 goes high
(while the bank is providing status information).
8. The fourth cycle of the autoselect command sequence is a read
cycle. The system must provide the bank address to obtain the
manufacturer ID, device ID, or SecSi Sector factory protect
information. Data bits DQ15–DQ8 are don’t care. While reading
the autoselect addresses, the bank address must be the same
9. For models 01, 02, the device ID must be read across the fourth,
fifth, and sixth cycles.
10. The data is 82h for factory locked, 42h for customer locked, and
02h for not factory/customer locked.
11. The data is 00h for an unprotected sector/sector block and 01h
for a protected sector/sector block.
12. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
13. The Unlock Bypass Reset command is required to return to the
read mode when the bank is in the unlock bypass mode.
14. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
15. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
16. Command is valid when device is ready to read array data or
when device is in autoselect mode.