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42
S29GL-P MirrorBit
TM
Flash Family
S29GL-P_00_A3 November21,2006
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
Figure 8.3
Lock Register Program Algorithm
Write Unlock Cycle
s
:
Addre
ss
555h, D
a
t
a
AAh
Addre
ss
2AAh, D
a
t
a
55h
Write
Enter Lock Regi
s
ter Comm
a
nd:
Addre
ss
555h, D
a
t
a
40h
Progr
a
m Lock Regi
s
ter D
a
t
a
Addre
ss
XXXh, D
a
t
a
A0h
Addre
ss
XXXh
*
, D
a
t
a
PD
Unlock Cycle 1
Unlock Cycle 2
XXXh = Addre
ss
don
’
t c
a
re
Progr
a
m D
a
t
a
(PD):
S
ee text for Lock Regi
s
ter definition
s
C
au
tion:
Lock regi
s
ter c
a
n only
b
e prog
a
mmed once.
W
a
it 4 m
s
(Recommended)
PA
SS
. Write Lock Regi
s
ter
Exit Comm
a
nd:
Addre
ss
XXXh, D
a
t
a
90h
Addre
ss
XXXh, D
a
t
a
00h
Device ret
u
rn
s
to re
a
ding
a
rr
a
y.
Perform Polling Algorithm
(
s
ee Write Oper
a
tion
S
t
a
t
us
flowch
a
rt)
Ye
s
Ye
s
No
No
Done
DQ5 = 1
Error condition (Exceeded Timing Limit
s
)
FAIL. Write re
s
t comm
a
nd
to ret
u
rn to re
a
ding
a
rr
a
y.
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| S29GL128P11FFIV13 | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
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| S29GL128P11TAI023 | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
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