參數(shù)資料
      型號(hào): S29GL064M90BDIR13
      廠商: Spansion Inc.
      英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
      中文描述: 3.0伏只頁面模式閃存具有0.23微米工藝技術(shù)的MirrorBit
      文件頁數(shù): 114/160頁
      文件大小: 2142K
      代理商: S29GL064M90BDIR13
      114
      S29GLxxxM MirrorBit
      TM
      Flash Family
      S29GLxxxM_00A5 April 30, 2004
      P r e l i m i n a r y
      Table 32. Command Definitions (x8 Mode, BYTE# = V
      IL
      )
      Command
      Sequence
      (Note 1)
      C
      Bus Cycles (Notes 2–5)
      Third
      Addr
      Data
      First
      Second
      Addr
      Fourth
      Fifth
      Sixth
      Addr
      RA
      XXX
      AAA
      Data
      RD
      F0
      AA
      Data
      Addr
      Data
      Addr
      Data
      Addr
      Data
      Read (Note 6)
      Reset (Note 7)
      Manufacturer ID
      1
      1
      4
      A
      Enter SecSi Sector Region
      Exit SecSi Sector Region
      Write to Buffer (Note 11)
      Program Buffer to Flash
      Write to Buffer Abort Reset (Note
      13)
      Chip Erase
      Sector Erase
      Program/Erase Suspend (Note
      14)
      Program/Erase Resume (Note
      15)
      CFI Query (Note 16)
      555
      55
      AAA
      90
      X00
      01
      Device ID (Note 9)
      4
      AAA
      AA
      555
      55
      AAA
      90
      X02
      7E
      X1C
      (Note
      17)
      X1E
      (Note
      17)
      SecSi‰ Sector Factory
      Protect (Note 10)
      Sector Group Protect Verify
      (Note 12)
      4
      AAA
      AA
      555
      55
      AAA
      90
      X06
      (Note 10)
      4
      AAA
      AA
      555
      55
      AAA
      90
      (SA)X04
      00/01
      3
      4
      3
      1
      AAA
      AAA
      AAA
      SA
      AA
      AA
      AA
      29
      555
      555
      555
      55
      55
      55
      AAA
      AAA
      SA
      88
      90
      25
      XXX
      SA
      00
      BC
      PA
      PD
      WBL
      PD
      3
      AAA
      AA
      555
      55
      AAA
      F0
      6
      6
      AAA
      AAA
      AA
      AA
      555
      555
      55
      55
      AAA
      AAA
      80
      80
      AAA
      AAA
      AA
      AA
      555
      555
      55
      55
      AAA
      SA
      10
      30
      1
      XXX
      B0
      1
      XXX
      30
      1
      AA
      98
      Legend:
      X = Don’t care
      RA = Read Address of memory location to be read.
      RD = Read Data read from location RA during read operation.
      PA = Program Address. Addresses latch on falling edge of WE# or
      CE# pulse, whichever happens later.
      PD = Program Data for location PA. Data latches on rising edge of
      WE# or CE# pulse, whichever happens first.
      SA = Sector Address of sector to be verified (in autoselect mode) or
      erased. Address bits A21–A15 uniquely select any sector.
      WBL = Write Buffer Location. Address must be within same write
      buffer page as PA.
      BC = Byte Count. Number of write buffer locations to load minus 1.
      Notes:
      1.
      2.
      3.
      4.
      See
      Table 1
      for description of bus operations.
      All values are in hexadecimal.
      Shaded cells indicate read cycles. All others are write cycles.
      During unlock and command cycles, when lower address bits are
      555 or AAA as shown in table, address bits above A11 are don’t
      care.
      Unless otherwise noted, address bits A21–A11 are don’t cares.
      No unlock or command cycles required when device is in read
      mode.
      Reset command is required to return to read mode (or to erase-
      suspend-read mode if previously in Erase Suspend) when device
      is in autoselect mode, or if DQ5 goes high while device is
      providing status information.
      Fourth cycle of autoselect command sequence is a read cycle.
      Data bits DQ15–DQ8 are don’t care. See
      Autoselect Command
      Sequence
      section or more information.
      Device ID must be read in three cycles.
      5.
      6.
      7.
      8.
      9.
      10. If WP# protects highest address sector, data is 98h for factory
      locked and 18h for not factory locked. If WP# protects lowest
      address sector, data is 88h for factory locked and 08h for not
      factor locked.
      11. Data is 00h for an unprotected sector group and 01h for a
      protected sector group.
      12. Total number of cycles in command sequence is determined by
      number of bytes written to write buffer. Maximum number of
      cycles in command sequence is 37, including “Program Buffer to
      Flash” command.
      13. Command sequence resets device for next command after
      aborted write-to-buffer operation.
      14. System may read and program in non-erasing sectors, or enter
      autoselect mode, when in Erase Suspend mode. Erase Suspend
      command is valid only during a sector erase operation.
      15. Erase Resume command is valid only during Erase Suspend
      mode.
      16. Command is valid when device is ready to read array data or
      when device is in autoselect mode.
      17. Refer to Table 14, AutoSelect Codes for individual Device IDs
      per device density and model number.
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