• <tfoot id="mtn16"></tfoot>
      參數(shù)資料
      型號(hào): S29GL01GP12FFIV13
      廠商: SPANSION LLC
      元件分類: PROM
      英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology
      中文描述: 1G X 1 FLASH 3V PROM, 120 ns, PBGA64
      封裝: 13 X 11 MM, 1 MM PITCH, LEAD FREE, FBGA-64
      文件頁數(shù): 29/71頁
      文件大?。?/td> 990K
      代理商: S29GL01GP12FFIV13
      November21,2006 S29GL-P_00_A3
      S29GL-P MirrorBit
      TM
      Flash Family
      27
      D a t a
      S h e e t
      ( A d v a n c e
      I n f o r m a t i o n )
      7.7.4
      Chip Erase Command Sequence
      Chip erase is a six-bus cycle operation as indicated by
      Table 12.1 on page 61
      . These commands invoke the
      Embedded Erase algorithm, which does not require the system to preprogram prior to erase. The Embedded
      Erase algorithm automatically preprograms and verifies the entire memory for an all zero data pattern prior to
      electrical erase. After a successful chip erase, all locations of the chip contain FFFFh. The system is not
      required to provide any controls or timings during these operations. The “Command Definition” section in the
      appendix shows the address and data requirements for the chip erase command sequence.
      When the Embedded Erase algorithm is complete, that sector returns to the read mode and addresses are no
      longer latched. The system can determine the status of the erase operation by using DQ7 or DQ6/DQ2. Refer
      to “Write Operation Status” for information on these status bits.
      The Unlock Bypass feature allows the host system to send program commands to the Flash device without
      first writing unlock cycles within the command sequence. See
      Section 7.7.8
      for details on the Unlock Bypass
      function.
      Any commands written during the chip erase operation are ignored. However, note that a hardware reset
      immediately terminates the erase operation. If that occurs, the chip erase command sequence should be
      reinitiated once that sector has returned to reading array data, to ensure the entire array is properly erased.
      Software Functions and Sample Code
      The following is a C source code example of using the chip erase function. Refer to the
      Spansion Low Level
      Driver User’s Guide
      (available on
      www.spansion.com
      ) for general information on Spansion Flash memory
      software development guidelines.
      /* Example: Chip Erase Command */
      /* Note: Cannot be suspended */
      *( (UINT16 *)base_addr + 0x555 ) = 0x00AA; /* write unlock cycle 1 */
      *( (UINT16 *)base_addr + 0x2AA ) = 0x0055; /* write unlock cycle 2 */
      *( (UINT16 *)base_addr + 0x555 ) = 0x0080; /* write setup command */
      *( (UINT16 *)base_addr + 0x555 ) = 0x00AA; /* write additional unlock cycle 1 */
      *( (UINT16 *)base_addr + 0x2AA ) = 0x0055; /* write additional unlock cycle 2 */
      *( (UINT16 *)base_addr + 0x000 ) = 0x0010; /* write chip erase command */
      Table 7.9
      Chip Erase
      (LLD Function = lld_ChipEraseCmd)
      Cycle
      Description
      Operation
      Byte Address
      Word Address
      Data
      1
      Unlock
      Write
      Base + AAAh
      Base + 555h
      00AAh
      2
      Unlock
      Write
      Base + 555h
      Base + 2AAh
      0055h
      3
      Setup Command
      Write
      Base + AAAh
      Base + 555h
      0080h
      4
      Unlock
      Write
      Base + AAAh
      Base + 555h
      00AAh
      5
      Unlock
      Write
      Base + 555h
      Base + 2AAh
      0055h
      6
      Chip Erase Command
      Write
      Base + AAAh
      Base + 555h
      0010h
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