參數(shù)資料
型號(hào)： S29CD032G0JFAN013
廠商： SPANSION LLC
元件分類： DRAM
英文描述： CMOS 2.5 VOLT ONLY BURST MODE DUAL BOOT, SIMULTANEOUS READ /WRITE FLASH MEMORY
中文描述： 1M X 32 FLASH 2.7V PROM, 67 ns, PBGA80
封裝： 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80
文件頁(yè)數(shù)： 1/93頁(yè)
文件大小： 1608K
代理商： S29CD032G0JFAN013
Publication Number
30606
Revision
B
Amendment
0
Issue Date
March 22, 2004
ADVANCE
INFORMATION
The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by
FASL LLC. FASL LLC reserves the right to change or discontinue work on any product without notice. The information in this document is provided
“
as is
”
without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of
S29CD032G
32 Megabit (1 M x 32-Bit)
CMOS 2.5 Volt-only Burst Mode, Dual Boot,
Simultaneous Read/Write Flash Memory
Data Sheet
Distinctive Characteristics
Architecture Advantages
Simultaneous Read/Write operations
— Data can be read from one bank while executing
erase/program functions in other bank
(-40°C to 85°C only)
— Zero latency between read and write operations
— Two bank architecture: 75%/25%
User-Defined x32 Data Bus
Dual Boot Block
— Top and bottom boot sectors in the same device
Flexible sector architecture
— Eight 8 Kbytes, sixty-two 64 Kbytes, and eight 8
Kbytes sectors
Manufactured on 170 nm process technology
SecSi (Secured Silicon) Sector (256 Bytes)
—
Factory locked and identifiabl
e: 16 bytes for secure,
random factory Electronic Serial Number; remainder
may be customer data programmed by AMD
—
Customer lockable:
Can be read, programmed or
erased just like other sectors. Once locked, data
cannot be changed
Programmable Burst interface
— Interface to any high performance processor
— Modes of Burst Read Operation:
—
Linear Burst
: 4 double words and 8 double words
with wrap around
Program Operation
— Ability to perform synchronous and asynchronous
write operations of burst configuration register
settings independently
Single power supply operation
— Optimized for 2.5 to 2.75 volt read, erase, and
program operations
Compatibility with JEDEC standards (JC42.4)
— Software compatible with single-power supply Flash
— Backward-compatible with AMD Am29LV and Am29F
flash memories
Performance Characteristics
High performance read access
— Initial/random access times as fast as 48 ns
— Burst access time as fast as 7.5 ns for ball grid array
package
Ultra low power consumption
— Burst Mode Read: 90 mA @ 66 MHz max, capable of
75 MHz (Fortified BGA only)
— Program/Erase: 50 mA max
— Standby mode: CMOS: 60 μA max
1 million write cycles per sector typical
20 year data retention typical
VersatileI/O control
— Device generates data output voltages and tolerates
data input voltages as determined by the voltage on
the V
IO
pin
— 1.65 V to 2.75 V compatible I/O signals
Software Features
Persistent Sector Protection
— A command sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector (requires only V
CC
levels)
Password Sector Protection
— A sophisticated sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector using a user-definable 64-bit password
Supports Common Flash Interface (CFI)
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
Hardware Features
Program Suspend/Resume & Erase Suspend/
Resume
— Suspends program or erase operations to allow
reading, programming, or erasing in same bank
Hardware Reset (RESET#), Ready/Busy# (RY/
BY#), and Write Protect (WP#) inputs
ACC input
— Accelerates programming time for higher throughput
during system production
Package options
— 80-pin PQFP
— 80-ball Fortified BGA
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