參數(shù)資料
型號(hào): S29CD016J1MQFM033
廠商: SPANSION LLC
元件分類: PROM
英文描述: 32/16 Megabit CMOS 2.6 Volt or 3.3 Volt-only Simultaneous Read/Write, Dual Boot, Burst Mode Flash Memory with VersatileI/O
中文描述: 512K X 32 FLASH 2.7V PROM, 54 ns, PQFP80
封裝: LEAD FREE, PLASTIC, MO-108CB-1, QFP-80
文件頁數(shù): 73/76頁
文件大小: 1245K
代理商: S29CD016J1MQFM033
September27,2006 S29CD-J_CL-J_00_B1
S29CD-J & S29CL-J Flash Family
71
D a t a
S h e e t
( P r e l i m i n a r y )
21. Revision History
Section
Description
Revision A0 (March 1, 2005)
Initial release.
Revision A1 (April 15, 2005)
Ordering Information and Valid
Combinations tables
Updated to include lead Pb-free options.
Revision A2 (January 20, 2006)
Ordering Information
Added “Contact factory” for 75 MHz. Modified Ordering Options for Characters 15 & 16 to reflect
autoselect ID & top/bottom boot. Changed “N” for Extended Temperature Range to “M”.
Input/Output Descriptions
Removed Logic Symbol Diagrams.
Additional Resources
Added section.
Memory Address Map
Changed “Bank 2” to “Bank 1”.
Simultaneous Read/Write Operation
Removed Ordering Options Table (Tables 3 & 4).
Advanced Sector Protection/
Unprotection
Added Advanced Sector Protection/Unprotection figure. Added figures for PPB Erase & Program
Algorithm.
Electronic Marking
Added in Electronic Marking section.
Absolute Maximum Ratings
Modified V
CC
Ratings to reflect 2.6 V and 3.6 V devices. Modified V
CC
Ratings to reflect 16 Mb & 32
Mb devices.
AC Characteristics
Added Note “t
OE
during Read Array”.
Changed values of t
AVAV
, t
AVQV
, t
ELQV
, t
GLQV
in table.
Moved t
DF
line to 90% on the high-Z output in figure.
Added t
AAVS
and t
AAVH
timing parameters to table. Changed t
CH
to t
CLKH
. Changed t
CL
to t
CLKL
.
Removed the following timing parameters:
t
DS
(Data Setup to WE# Rising Edge)
t
DH
(Data Hold from WE# Rising Edge)
t
AS
(Address Setup to Falling Edge of WE#)
t
AH
(Address Hold from Falling Edge of WE#)
t
CS
(CE# Setup Time)
t
CH
(CE# Hold Time)
t
ACS
(Address Setup Time to CLK)
t
ACH
(Address Hold Time from ADV# Rising Edge of CLK while ADV# is Low)
Added the following timing parameters:
t
AAVS
t
DVCH
t
INDS
t
INDH
In figure, changed t
OEH
to t
WEH
; changed t
WPH
to t
OEP
.
Asynchronous Read Operation
Conventional Read Operation Timings
Burst Mode Read for 32 Mb & 16 Mb
Burst Mode Read (x32 Mode)
Asynchronous Command Write Timing
Synchronous Command Write/Read
Timing
Removed t
WADVH
and t
WCKS
from figure.
WP# Timing
In figure, changed t
CH
to t
BUSY
In table, added Note 3: Program/Erase parameters are the same regardless of synchronous or
asynchronous mode. Added t
OEP
(OE# High Pulse)
Erase/Program Operations
Alternative CE# Controlled Erase/
Program Operations
Removed t
OES
from table. Added t
WADVS
and t
WCKS
Appendix 2: Command Definitions
Removed “or when device is in autoselect mode” from Note 14.
Revision B0 (June 12, 2006)
Global
Changed document status to Preliminary.
Distinctive Characteristics
Changed cycling endurance from typical to guaranteed.
Performance Characteristics
Updated Max Asynch. Access Time, Max CE# Access Time, and Max OE# Access time in table.
Ordering Information
Updated additional ordering options in designator breakout table. Updated valid combination tables.
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