參數(shù)資料
型號(hào): S29CD016J1MFFI002
廠商: Spansion Inc.
英文描述: 32/16 Megabit CMOS 2.6 Volt or 3.3 Volt-only Simultaneous Read/Write, Dual Boot, Burst Mode Flash Memory with VersatileI/O
中文描述: 32/16兆位的CMOS 2.6伏或3.3伏,只有同時(shí)讀/寫,雙啟動(dòng),突發(fā)模式閃存記憶體與VersatileI /輸出
文件頁數(shù): 31/76頁
文件大?。?/td> 1245K
代理商: S29CD016J1MFFI002
September27,2006 S29CD-J_CL-J_00_B1
S29CD-J & S29CL-J Flash Family
29
D a t a
S h e e t
( P r e l i m i n a r y )
Figure 8.6
Erase Operation
Notes
1. See
Section 20.1, Command Definitions on page 69
for erase command sequence.
2. See
Section 8.8.6, DQ3: Sector Erase Timer on page 35
for more information.
8.7.4
Erase Suspend / Erase Resume Commands
The Erase Suspend command allows the system to interrupt a sector erase operation and then read data
from, or program data to, any sector not selected for erasure. When the Erase Suspend command is written
during the sector erase time-out, the device immediately terminates the time-out period and suspends the
erase operation. The bank address is required when writing this command. This command is valid only during
the sector erase operation, including the minimum 80-μs time-out period during the sector erase command
sequence. The Erase Suspend command is ignored if written during the chip erase operation.
When the Erase Suspend command is written after the 80-μs time-out period has expired and during the
sector erase operation, the device takes 20 μs maximum to suspend the erase operation.
After the erase operation has been suspended, the bank enters the erase-suspend-read mode. The system
can read data from or program data to any sector that is not selected for erasure. (The device “erase
suspends” all sectors selected for erasure.) Note that when the device is in the Erase Suspend mode, the
Reset command is not required for read operations and is ignored.
Further nesting of erase operation is not permitted. Reading at any address within erase suspended sectors
produces status information on DQ7-DQ0. The system can use DQ6 and DQ2 together, to determine if a
sector is actively erasing or is erase-suspended. Refer to Table 8.8 on page 34 for information on these
status bits.
A read operation from the erase-suspended bank returns polling data during the first 8 μs after the erase
suspend command is issued; read operations thereafter return array data. Read operations from the other
bank return array data with no latency.
After an erase-suspended program operation is complete, the bank returns to the erase-suspend read mode.
The system can determine the status of the program operation using the DQ7, DQ6, and/or RY/BY# status
bits, just as in the standard program operation.
To resume the sector erase operation, the system must write the Erase Resume command. The bank
address of the erase-suspended bank is required when writing this command. Further writes of the Resume
command are ignored. Another Erase Suspend command can be written after the chip has resumed erasing.
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