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參數(shù)資料
| 型號(hào)： | S1T8825B01-R0B0 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 1.3GHZ DUAL PLL |
| 中文描述： | 1.3GHz的雙鎖相環(huán) |
| 文件頁數(shù)： | 5/16頁 |
| 文件大小： | 275K |
| 代理商： | S1T8825B01-R0B0 |
1.3GHZ DUAL PLL
S1T8825B
5
FUNCTIONAL DESCRIPTIONS
SERIAL DATA INPUT AND TIMING
CK (Pin6), DATA (Pin7), EN (Pin8) terminals in S1T8825B are used for MCU serial data interface (LSB: 1st input
data; MSB: Last input data). Serial data controls the programmable reference divider, programmable divider (CH1),
programmable divider (CH2), and control latch separately by means of group code. Binary serial data is entered via
the DATA pin.
One bit of data is shifted into the internal shift register on the rising edge of the clock. When EN pin is high, stored
data is latched. The three terminals, CK, DATA, and EN, contain Schmitt trigger circuits to keep the data from errors
caused by noise, etc.
< Notice >
1. When power supply of S1T8825B is disconnected, CLK, DATA, EN port from MCU should be pulled low.
2. When power goes up first, R counter data should be entered earlier than N1 and N2 counter data.
3. When power goes up first, control data should be entered earlier than N1 and N2 counter data.
Figure 1.
NOTE
: Start data input with LSB first
SERIAL DATA GROUP AND GROUP CODE
The S1T8825B can be controlled through 4 kinds of group selection. Each group is identified by selective a 2-bit
group code given below.
Serial Bits
Group Location
GC1 (MSB)
GC2 (MSB-1)
0
0
Control Latch
0
1
Ch 1 N Latch
1
0
Ch 2 N Latch
1
1
OSC R Latch
≥
≥
≥
1us
0.2us
0.2us
0.1us
0.2us
0.1us
0.2us
0.2us
EN
DATA
CK
MSB
N1 (R1)
N2 (R2)
N3 (R3)
N16 (R11)
N17 (R12)
GC2
GC1
MSB
MSB
≥
≥
≥
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