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參數(shù)資料
| 型號： | S1M8821 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | INTERGER RF/IF DUAL PLL |
| 中文描述： | 整數(shù)射頻/中頻雙鎖相環(huán) |
| 文件頁數(shù)： | 6/22頁 |
| 文件大?。?/td> | 426K |
| 代理商： | S1M8821 |
S1M8821/22/23
INTERGER RF/IF DUAL PLL
6
PIN DESCRIPTION
Pin No
(20TSSOP)
Pin No
(24QFN)
Symbol
I / O
Description
1
24
V
DD
1
-
Power supply voltage input for the RF PLL part. V
DD
1 must
equal V
DD
2. In order to reject supply noise, bypass capacitors
must be placed as close as possible to this pin and be
connected directly to the ground plane.
-
1
-
N/C
No connection.
2
2
Vp1
-
Power supply voltage input for RF charge pump(
≥
V
DD
1).
3
3
CPoRF
O
Internal RF charge pump output for connection to an external
loop filter whose filtered output drives an external VCO.
4
4
GND
-
Ground for RF digital blocks.
5
5
finRF
I
RF prescaler input. The signal comes from the external VCO.
6
6
finRF
I
The complementary input of the RF prescaler. A bypass
capacitor must be placed as close as possible to this pin and
be connected directly to the ground plane. The bypass
capacitor is optional with some loss of sensitivity.
7
7
GND
-
Ground for RF analog blocks.
8
8
OSCin
I
Reference counter input. TCXO is connected via a coupling
capacitor.
-
9
-
N/C
No connection.
9
10
GND
f
oLD
-
Ground for IF digital blocks.
10
11
O
Multiplexed output of the RF/IF programmable counters, the
reference counters, the lock detect signals and the shift
registers. The output level is CMOS level. (see f
out
Programmable Truth Table)
11
12
CLOCK
I
CMOS clock input. Serial data for the various counters is
transferred into the 22-bit shift register on the rising edge of
the clock signal.
-
13
-
N/C
No connection.
12
14
DATA
I
Binary serial data input. The MSB of CMOS input data is
entered first. The control bits are on the last two bits. CMOS
input.
13
15
LE
I
Load enable CMOS input. When LE becomes high, the data
in the shift register is loaded into one of the four latches (by
the control bits).
14
16
GND
-
Ground for IF analog blocks.
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| S1M8821X01-R0T0 | INTERGER RF/IF DUAL PLL |
| S1M8822 | INTERGER RF/IF DUAL PLL |
| S1M8822X01-R0T0 | INTERGER RF/IF DUAL PLL |
| S1M8823 | INTERGER RF/IF DUAL PLL |
| S1M8823X01-R0T0 | INTERGER RF/IF DUAL PLL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S1M8821X01-R0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8822 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8822X01-R0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8823 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
| S1M8823X01-R0T0 | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:INTERGER RF/IF DUAL PLL |
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