參數(shù)資料
型號: S1L9226X01-Q0R0
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: RF AMP & SERVO SIGNAL PROCESSOR
中文描述: 射頻放大器
文件頁數(shù): 45/56頁
文件大?。?/td> 454K
代理商: S1L9226X01-Q0R0
RF AMP & SERVO SIGNAL PROCESSOR
S1L9226X
5
PRELIMINARY
FOCUS OFFSET CONTROL
Focus Offset control starts when it receives the Focus Offset control start command $842X from micom. Focus
Offset control ends when the focus error amp output below 1/2VCC after the focus output with 1/2 VCC at the focus
error amp final output terminal. The voltage per 1 step of the focus offset control is approximately 40mV. The 4 bit
resistance DAC changes from 320mV up to -320mV in 1 step, after which 1/2 step, approximately -20ms offset, is
applied. The offset dispersion after Focus offset control exists between -20mV - +20mV. The Febias Offset can be
changed in 10mV step within the micom's
±
100mV range after focus offset control. The required per 1 step is
2.5ms; for 4 bits and total of 16 steps, the maximum required time is 128ms.
For focus offset readjust, 4-bit DAC is reset by $867, and reset can be canceled only when the $86FX applied D3
bit is changed from 0
1. The Febias DAC latch block reset for electrostatics and operation error is reset by
micom DATA and not by RESET terminal, the system reset.
31
+
-
Focus Phase
Compensation
-
+
PS
4
0
0
1
1
3
0
1
0
1
X1
X2
X3
X4
+
-
+
-
+
-
30
7
9
10
11
8
3.6K
60K
FZC
I
20K
DFCTI
48K
FS4B
FS3
580K
FGD
FSI
470K
40K
FS2B
82K
40K
10K
50K
5K
FS1
FSET
FLB
FRCH
FEM
FEO
to Digital
VC
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