
8: REGISTERS
1-82
EPSON
S1D13806 SERIES HARDWARE FUNCTIONAL
SPECIFICATION (X28B-A-001-03)
REG[07Eh] LCD Ink/Cursor FIFO High Threshold Register
Look-Up Table Registers
CRT/TV Ink/Cursor Registers
REG[1E0h] Look-Up Table Mode Regist
erREG[080h] CRT/TV Ink/Cursor Control Regist
er113 REG[1E2h] Look-Up Table Address Register
REG[081h] CRT/TV Ink/Cursor Start Address Register
114 REG[1E4h] Look-Up Table Data Register
REG[082h] CRT/TV Cursor X Position Register 0
Power Save Configuration Registers
REG[083h] CRT/TV Cursor X Position Register 1
115 REG[1F0h] Power Save Configuration Register
REG[084h] CRT/TV Cursor Y Position Register 0
115 REG[1F1h] Power Save Status Regi
ster REG[085h] CRT/TV Cursor Y Position Register 1
Miscellaneous Register
REG[086h] CRT/TV Ink/Cursor Blue Color 0 Re
gister116 REG[1F4h] CPU-To-Memory Access Watchdog Timer Register
REG[087h] CRT/TV Ink/Cursor Green Color 0 Regist
erCommon Display Mode Register
REG[088h] CRT/TV Ink/Cursor Red Color 0 Regist
er116 REG[1FCh] Display Mode Register
REG[08Ah] CRT/TV Ink/Cursor Blue Color 1 Register
MediaPlug Control Registers
REG[08Bh] CRT/TV Ink/Cursor Green Color 1 Register
117 REG[1000h] MediaPlug LCMD Regist
er REG[08Ch] CRT/TV Ink/Cursor Red Color 1 Regist
er117 REG[1002h] MediaPlug Reserved LCMD Register
REG[08Eh] CRT/TV Ink/Cursor FIFO High Threshold Register
117 REG[1004h] MediaPlug CMD Register
BitBLT Configuration Registers
REG[1006h] MediaPlug Reserved CMD Register
REG[100h] BitBLT Control Register 0
MediaPlug Data Registers
REG[101h] BitBLT Control Register 1
119 REG[1008h] to REG[1FFEh] MediaPlug Data Register
REG[102h] BitBLT ROP Code/Color Expansion Regi
sterBitBLT Data Registers
REG[103h] BitBLT Operation Register
121 REG[100000h] to REG[1FFFFEh] BitBLT Data Register 0
REG[104h] BitBLT Source Start Address Register 0
REG[105h] BitBLT Source Start Address Register 1
REG[106h] BitBLT Source Start Address Register 2
REG[108h] BitBLT Destination Start Address Register 0
REG[109h] BitBLT Destination Start Address Register 1
REG[10Ah] BitBLT Destination Start Address Register 2
REG[10Ch] BitBLT Memory Address Offset Register 0
REG[10Dh] BitBLT Memory Address Offset Register 1
REG[110h] BitBLT Width Register 0
REG[111h] BitBLT Width Register 1
REG[112h] BitBLT Height Register 0
REG[113h] BitBLT Height Register 1
REG[114h] BitBLT Background Color Register 0
REG[115h] BitBLT Background Color Register 1
REG[118h] BitBLT Foreground Color Register 0
REG[119h] BitBLT Foreground Color Register 1
Table 8-2 S1D13806 Registers (Continued)
Register
Pg
Register
Pg