參數(shù)資料
型號(hào): S1C63567F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP144
封裝: PLASTIC, QFP-144
文件頁(yè)數(shù): 124/172頁(yè)
文件大小: 1349K
代理商: S1C63567F0A0100
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)當(dāng)前第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)
S1C63567 TECHNICAL MANUAL
EPSON
45
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (I/O Ports)
Table 4.6.6.1(b) Control bits of I/O ports
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
FF4CH
IOC33
IOC32
IOC31
IOC30
R/W
IOC33
IOC32
IOC31
IOC30
0
Output
Input
P30–P33 I/O control register
FF4DH
PUL33
PUL32
PUL31
PUL30
R/W
PUL33
PUL32
PUL31
PUL30
1
On
Off
P30–P33 pull-up control register
FF4EH
P33
P32
P31
P30
R/W
P33
P32
P31
P30
2
High
Low
P30–P33 I/O port data
FF61H
EXLCDC ALOFF
ALON
LPAGE
R/W
EXLCDC
ALOFF
ALON
LPAGE
0
1
0
Enable
All Off
All On
F100-F177
Disable
Normal
F000-F077
Expanded LCD driver signal control
LCD all Off control
LCD all On control
Display memory area selection (when 1/8 duty is selected)
General-purpose register when 1/16, 1/17 duty is selected
0
Clk-sync. master
2
Async. 7-bit
1
Clk-sync. slave
3
Async. 8-bit
[SMD1, 0]
Mode
[SMD1, 0]
Mode
FF70H
0
SMD1
SMD0
ESIF
R
R/W
0 3
SMD1
SMD0
ESIF
2
0
SIF
I/O
Unused
Serial I/F
mode selection
Serial I/F enable (P1x port function selection)
*1 Initial value at initial reset
*2 Not set in the circuit
*3 Constantly "0" when being read
(1) Selection of port function
EXLCDC: Expanded LCD driver signal control register (FF61HD3)
Sets P22 and P23 to the CL signal and the FR signal output ports.
When "1" is written: CL/FR signal output
When "0" is written: I/O port
Reading: Valid
When setting P22 to the CL (LCD synchronous signal) output and P23 to the FR (LCD frame signal)
output, write "1" to this register and when they are used as I/O ports, write "0".
The CL and FR signals are output from the P22 terminal and P23 terminal immediately after the functions
are switched by the EXLCDC register. In this case, the control registers for P22 and P23 can be used as
general purpose registers that do not affect the output.
At initial reset, this register is set to "0".
ESIF: Serial interface enable register (FF70HD0)
Selects function for P10–P13.
When "1" is written: Serial interface input/output port
When "0" is written: I/O port
Reading: Valid
When using the serial interface, write "1" to this register and when P10–P13 are used as the I/O port,
write "0". The terminal configuration within P10–P13 that are used for the serial interface is decided by
the transfer mode (7-bit asynchronous, 8-bit asynchronous, clock synclonous slave, clock synchronous
master) selected with the SMD1 and SMD0 registers.
In the clock synchronous slave mode, all the P10–P13 ports are set to the serial interface input/output
port. In the clock synchronous master mode, P10–P12 are set to the serial interface input/output port and
P13 can be used as the I/O port. In the 8/7-bit asynchronous mode, P10 and P11 are set to the serial
interface input/output port and P12 and P13 can be used as the I/O port.
At initial reset, this register is set to "0".
相關(guān)PDF資料
PDF描述
S1C63653F 4-BIT, FLASH, 4 MHz, MICROCONTROLLER, CQFP100
S1C6F567D0A0100 MICROCONTROLLER, UUC141
S1C6N3B0D0A0100 MICROCONTROLLER, UUC54
S1C6P366D0A0100 4-BIT, FLASH, 4.1 MHz, MICROCONTROLLER, UUC102
S1C6P466D0A0A00 MICROCONTROLLER, UUC140
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S1C63616 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer
S1C63632 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer
S1C63653 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller
S1C63656 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer
S1C63657 制造商:EPSON 制造商全稱:EPSON 功能描述:CMOS 4-bit Single Chip Microcontroller