參數(shù)資料
型號: S-817B36AUA-CWZ-T2
廠商: Seiko Instruments Inc.
英文描述: SUPER-SMALL PACKAGE CMOS VOLTAGE REGULATOR
中文描述: 超小型封裝CMOS電壓穩(wěn)壓器
文件頁數(shù): 7/28頁
文件大?。?/td> 412K
代理商: S-817B36AUA-CWZ-T2
Rev.2.3
S-817 Series
ULTRA COMPACT CMOS VOLTAGE REGULATOR
Seiko Instruments Inc.
7
Test Circuits
1.
2.
3.
Figure 6 Test Circuits
Standard Circuit
VSS
VOUT
VIN
C
IN
CL
INPUT
OUTPUT
GND
Single GND
Figure 7 Standard Circuit
Technical Terms
1. Low ESR
ESR is the abbreviation for Equivalent Series Resistance.
Low ESR output capacitors (CL) can be used in the S-817 Series.
2. Output voltage (V
OUT
)
The accuracy of the output voltage is
±
2.0% guaranteed under the specified conditions for input voltage,
which differs depending upon the product items, output current, and temperature.
Note:
If the above conditions change, the output voltage value may vary and go out of the accuracy range
of the output voltage. See the electrical characteristics and characteristics data for details.
3. Line regulations 1 and 2 (
V
OUT
1,
V
OUT
2)
Indicate the input voltage dependencies of output voltage. That is, the values show how much the output
voltage changes due to a change in the input voltage with the output current remained unchanged.
4. Load regulation (
V
OUT
3)
Indicates the output current dependencies of output voltage. That is, the values show how much the output
voltage changes due to a change in the output current with the input voltage remained unchanged.
VSS
VOUT
VIN
V
A
VSS
VOUT
VIN
A
VSS
VOUT
VIN
V
A
In addition to a tantalum capacitor, a ceramic
capacitor of 0.1
μ
F or more can be used for CL.
C
IN
is a capacitor used to stabilize input.
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