參數(shù)資料
型號: S-817A20
廠商: Seiko Instruments Inc.
英文描述: 2.0V±2.0% Ultra Compact 3-Pin Positive Voltage Regulator(輸出電壓2.0V±2.0%,緊湊型結(jié)構(gòu)3腳正電壓穩(wěn)壓器)
中文描述: 2.0V的± 2.0%,超小型3引腳正電壓穩(wěn)壓器(輸出電壓2.0V的± 2.0%,緊湊型結(jié)構(gòu)3腳正電壓穩(wěn)壓器)
文件頁數(shù): 7/23頁
文件大?。?/td> 414K
代理商: S-817A20
ULTRA COMPACT CMOS VOLTAGE REGULATOR
S-817 Series
Rev.1.1
6
Seiko Instruments Inc.
n
Operation
1. Basic Operation
Figure 6 shows the block diagram of the S-817
Series.
The error amplifier compares a reference voltage
V
ref
with part of the output voltage divided by the
feedback resistors Rs and Rf. It supplies the output
transistor with the gate voltage, necessary to ensure
certain output voltage free of any fluctuations of input
voltage and temperature.
2. Output Transistor
The S-817 Series uses a Pch MOS transistor as the output transistor.
Be sure that V
OUT
does not exceed V
IN
+0.3 V to prevent the voltage regulator from being broken due to
inverse current flowing when the voltage at V
OUT
pin goes higher than that at V
IN
pin because the parasitic
diode is connected between pins V
IN
and V
OUT
.
3. Short Current Limit Circuit
The S-817 Series incorporates a short current limit circuit to protect the output transistor against shortcircuiting
between pins VOUT and VSS. The short current limit circuit controls output current as shown in (1) OUTPUT
VOLTAGE versus OUTPUT CURRENT curve, and prevents output current of approx. 40 mA or more from
flowing even if VOUT and VSS pins are shorted.
However, the short current limit circuit does not protect thermal shutdown.
Be sure that input voltage and load current do not exceed the specified power dissipation level.
When output current is large and a difference between input and output voltages is large even if not shorted,
the short current limit circuit may start functioning and the output current may be controlled to the specified
amperage.
For details, refer to (3) MAXIMUM OUTPUT CURRENT versus INPUT VOLTAGE curve (page 11).
n
Selection of Output Capacitor (CL)
To stabilize operation against any fluctuation in output load, a capacitor (CL) must be mounted between pins
VOUT and VSS in the S-817 Series because the phase is compensated with the help of the internal phase
compensating circuit and ESR of the output capacitor.
When selecting a ceramic or an OS capacitor:
Capacitance of 0.1
μ
F or more
When selecting a tantalum or an aluminum electrolytic capacitor.
Capacitance of 0.1
μ
F or more and ESR of 30
or less
Pay special attention not to cause an oscillation due to an increase in ESR at low temperatures, when you
select an aluminum electrolytic capacitor. Check the capacitor for its performance including temperature
characteristics before use.
Overshoot and undershoot characteristics differ depending upon the type of the output capacitor you select.
Refer to CL dependencies in “TRANSIENT RESPONSE CHARACTERISTICS” (pages 14 through 18).
Reference
voltage
circuit
VOUT
*1
*1 Parasitic diode
VSS
VIN
Rs
Rf
Error amplifier
Current
source
Vref
Figure 6 Typical Circuit Block Diagram
相關(guān)PDF資料
PDF描述
S-817A25 2.5V±2.0% Ultra Compact 3-Pin Positive Voltage Regulator(輸出電壓2.5V±2.0%,緊湊型結(jié)構(gòu)3腳正電壓穩(wěn)壓器)
S-817A30 3.0V±2.0% Ultra Compact 3-Pin Positive Voltage Regulator(輸出電壓3.0V±2.0%,緊湊型結(jié)構(gòu)3腳正電壓穩(wěn)壓器)
S-817A33 3.3V±2.0% Ultra Compact 3-Pin Positive Voltage Regulator(輸出電壓3.3V±2.0%,緊湊型結(jié)構(gòu)3腳正電壓穩(wěn)壓器)
S-817A35 3.5V±2.0% Ultra Compact 3-Pin Positive Voltage Regulator(輸出電壓3.5V±2.0%,緊湊型結(jié)構(gòu)3腳正電壓穩(wěn)壓器)
S-817A40 4.0V±2.0% Ultra Compact 3-Pin Positive Voltage Regulator(輸出電壓4.0V±2.0%,緊湊型結(jié)構(gòu)3腳正電壓穩(wěn)壓器)
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