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參數(shù)資料
| 型號： | S-29131A |
| 廠商： | Seiko Instruments Inc. |
| 英文描述： | 64-Word x 16-Bit CMOS Serial EEPROM(1K位CMOS串行EEPROM) |
| 中文描述： | 64字× 16位的CMOS串行EEPROM（每1000位的CMOS串行EEPROM的） |
| 文件頁數(shù)： | 14/47頁 |
| 文件大?。?/td> | 261K |
| 代理商： | S-29131A |
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CMOS SERIAL E
2
PROM
S-29XX1A Series
Seiko Instruments Inc.
13
Receiving a Start-Bit
Both the recognition of a start-bit and the VERIFY procedure occur when CS is “high.” Therefore, only after a write
operation, in order to accept the next command by having CS go high, will the DO pin switch from a state of high-
impedence to a state of data output; but if it recognizes a start-bit, the DO pin returns to a state of high-impedence.
Three-wire Interface (DI-DO direct connection)
Although the normal configuration of a serial interface is a 4-wire interface to CS, SK, DI, and DO, a 3-wire interface is
also a possibility by connecting DI and DO. However, since there is a possibility that the DO output from the serial
memory IC will interfere with the data output from the CPU with a 3-wire interface, install a resistor between DI and
DO in order to give preference to data output from the CPU to DI(See Figure 28).
Memory Protection
DI
DO
SIO
Figure 28
CPU
S-29XX1A
R : 10 to 100 k
Figure 29 PROTECT Terminal Input Signal Timing
The S-29XX1A Series is capable of protecting the memory. So, the contents of the memory will not be miswritten
due to error run or malfunction of the CPU. When the PROTECT terminal is connected to GND or OPEN, write to
Bank 1 in the memory array is prohibited (50% of the memory can be protected starting from address 00). Because
the pull-down resistance is connected to the PROTECT terminal internally, the memory can be automatically
protected when the PROTECT terminal is OPEN. When the protection is valid, the data in the memory of Bank 1
will not be rewritten. However, because the write control circuit inside the IC functions, the next instruction cannot
be executed during the time period of writing (t
PR
). While write instruction is being input and write is being
executed, always connect the PROTECT terminal to ” H, ” ” L” or OPEN, and leave the input signal unchanged (see
Figure 29).
CS
Verify
Write Instruction Input
DO
busy
Hi-Z
Hi-Z
ready
t
PR
0.2 s Min.
0.2 s Min.
PROTECT
DI
SK
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PDF描述 |
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| S-29255 | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| S-29255ACA | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-29131ADP | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S-29131ADPA | 功能描述:電可擦除可編程只讀存儲器 1K (64X16) 3-Wire RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| S-29131AFJ | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:CMOS SERIAL EEPROM |
| S2914B WAF | 制造商:Intel 功能描述: |
| S2914B(G)4 WAF | 制造商:Intel 功能描述: |
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