參數(shù)資料
型號(hào): S-2900A
廠(chǎng)商: Seiko Instruments Inc.
英文描述: CMOS 512Bit Serial EEPROM(512位 CMOS 串行EEPROM)
中文描述: 512位元的CMOS串行EEPROM(512位的CMOS串行EEPROM的)
文件頁(yè)數(shù): 6/39頁(yè)
文件大?。?/td> 144K
代理商: S-2900A
CMOS 512-bit SERIAL E
2
PROM
S-2900A
Seiko Instruments Inc.
5
Operation
(1) Read (READ) mode
After changing CS from “L” to “H”, this mode inputs the op code and address into DATA, synchronized with the rise of SK.
When A0 is input at the rise of the eighth SK clock cycle, eight-bit data in the specified address is output from the DATA
pin, synchronized with the falling of SK.
The DATA pin changes to high impedance after CS changes to “L”.
Figure 4
1
t
DS
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1
0
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
CS
SK
DATA
t
CSS
t
SKH
t
SKL
t
CSH
t
HZ1
t
HZ2
t
PD
t
DH
(2) Write (PROGRAM) mode
After changing CS from “L” to “H”, this mode inputs the op code, address, and data (eight -bit) into DATA, synchronized
with the rise of SK. After data is input, by changing CS from “H” to “L” again, data is written to the chip (the write
operation). The write operation time is decided by the timer inside of the IC (10 ms max.).
After the write operation, The S-2900A is automatically in program disable mode. Therefore, the S-2900A must be in
program enable mode through executing the PEN instruction before the write operation.
For confirming completion of the write operation, check the status read mode described later.
Figure 5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
0
1
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
CS
SK
DATA
t
CSS
t
CSH
t
CDS
t
SKH
t
SKL
t
DH
t
DS
t
PR
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