- 您現在的位置：買賣IC網 > PDF目錄192275 > S-1323B33PF-N8STFU 3.3 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4 PDF資料下載
參數資料
| 型號： | S-1323B33PF-N8STFU |
| 元件分類： | 固定正電壓單路輸出LDO穩(wěn)壓器 |
| 英文描述： | 3.3 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4 |
| 封裝： | HALOGEN FREE AND LEAD FREE, SNT-4 |
| 文件頁數： | 5/28頁 |
| 文件大?。?/td> | 322K |
| 代理商： | S-1323B33PF-N8STFU |
第1頁第2頁第3頁第4頁當前第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR
Rev.5.0_00
S-1323 Series
Seiko Instruments Inc.
13
3. Shutdown pin (ON/OFF pin)
This pin starts and stops the regulator.
When the ON/OFF pin is set to the shutdown level, the operation of all internal circuits stops, and the built-
in P-channel MOS FET output transistor between the VIN pin and VOUT pin is turned off to substantially
reduce the current consumption. The VOUT pin becomes the VSS level due to the internally divided
resistance of several hundreds k
Ω between the VOUT pin and VSS pin.
The structure of the ON/OFF pin is as shown in Figure 13. Since the ON/OFF pin is neither pulled down
nor pulled up internally, do not use it in the floating state. In addition, note that the current consumption
increases if a voltage of 0.3 V to VIN – 0.3 V is applied to the ON/OFF pin. When the ON/OFF pin is not
used, connect it to the VSS pin if the logic type is “A” and to the VIN pin if it is “B”.
Table 6
Logic Type
ON/OFF Pin
Internal Circuits
VOUT Pin Voltage
Current Consumption
A
“L”: Power on
Operating
Set value
ISS1
A
“H”: Power off
Stopped
VSS level
ISS2
B
“L”: Power off
Stopped
VSS level
ISS2
B
“H”: Power on
Operating
Set value
ISS1
VSS
ON/OFF
VIN
Figure 13
Selection of Output Capacitor (CL)
The S-1323 Series requires an output capacitor between the VOUT and VSS pins for phase compensation. A
ceramic capacitor with a capacitance of 1.0
μF or more can be used. Even if using an OS capacitor, tantalum
capacitor, or aluminum electrolytic capacitor, a capacitance of 1.0
μF or more and an ESR of 10 Ω or less are
required.
The value of the output overshoot or undershoot transient response varies depending on the value of the output
capacitor.
When selecting the output capacitor, perform sufficient evaluation, including evaluation of temperature
characteristics, on the actual device.
相關PDF資料 |
PDF描述 |
|---|---|
| S-1323B53NB-N9MTFU | 5.3 V FIXED POSITIVE LDO REGULATOR, 0.65 V DROPOUT, PDSO4 |
| S-1701B5042-M5T1U | 5 V FIXED POSITIVE LDO REGULATOR, 0.21 V DROPOUT, PDSO5 |
| S-1701B5042-U5T1U | 5 V FIXED POSITIVE LDO REGULATOR, 0.21 V DROPOUT, PDSO5 |
| S-1701C3024-M5T1U | 3 V FIXED POSITIVE LDO REGULATOR, 0.21 V DROPOUT, PDSO5 |
| S-1701D5041-M5T1U | 5 V FIXED POSITIVE LDO REGULATOR, 0.21 V DROPOUT, PDSO5 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| S-1323B34NB-N8TTFG | 功能描述:低壓差穩(wěn)壓器 - LDO 3.4 V 1% 70uV RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| S-1323B34PF-N8TTFG | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR |
| S-1323B35NB-N8UTFG | 功能描述:低壓差穩(wěn)壓器 - LDO Linear LDO Reg Hi 70uA Iq 150mA Iout RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| S-1323B35NB-N8UTFU | 功能描述:IC REG LINEAR 150MA SC82AB 制造商:ablic u.s.a. inc. 系列:* 包裝:剪切帶（CT） 零件狀態(tài):在售 穩(wěn)壓器數:1 電流 - 輸出:150mA 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:SC-82A，SOT-343 供應商器件封裝:SC-82AB 標準包裝:1 |
| S-1323B35PF-N8UTFG | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION AND SMALL PACKAGE CMOS VOLTAGE REGULATOR |
發(fā)布緊急采購，3分鐘左右您將得到回復。