參數(shù)資料
型號(hào): S-1172B20-E6T1U
元件分類: 固定正電壓?jiǎn)温份敵鯨DO穩(wěn)壓器
英文描述: 2 V FIXED POSITIVE LDO REGULATOR, 0.15 V DROPOUT, PDSO6
封裝: HALOGEN FREE AND LEAD FREE, HSOP-6
文件頁(yè)數(shù): 29/34頁(yè)
文件大?。?/td> 478K
代理商: S-1172B20-E6T1U
ProASIC3 DC and Switching Characteristics
v1.3
2 - 77
Timing Characteristics
Figure 2-26 Timing Model and Waveforms
PRE
CLR
Out
CLK
Data
EN
tSUE
50%
tSUD
tHD
50%
tCLKQ
0
tHE
tRECPRE
tREMPRE
tRECCLR
tREMCLR
tWCLR
tWPRE
tPRE2Q
tCLR2Q
tCKMPWHtCKMPWL
50%
Table 2-97 Register Delays
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V
Parameter
Description
–2
–1
Std.
–F
Units
tCLKQ
Clock-to-Q of the Core Register
0.55 0.63 0.74 0.89
ns
tSUD
Data Setup Time for the Core Register
0.43 0.49 0.57 0.69
ns
tHD
Data Hold Time for the Core Register
0.00 0.00 0.00 0.00
ns
tSUE
Enable Setup Time for the Core Register
0.45 0.52 0.61 0.73
ns
tHE
Enable Hold Time for the Core Register
0.00 0.00 0.00 0.00
ns
tCLR2Q
Asynchronous Clear-to-Q of the Core Register
0.40 0.45 0.53 0.64
ns
tPRE2Q
Asynchronous Preset-to-Q of the Core Register
0.40 0.45 0.53 0.64
ns
tREMCLR
Asynchronous Clear Removal Time for the Core Register
0.00 0.00 0.00 0.00
ns
tRECCLR
Asynchronous Clear Recovery Time for the Core Register
0.22 0.25 0.30 0.36
ns
tREMPRE
Asynchronous Preset Removal Time for the Core Register
0.00 0.00 0.00 0.00
ns
tRECPRE
Asynchronous Preset Recovery Time for the Core Register
0.22 0.25 0.30 0.36
ns
tWCLR
Asynchronous Clear Minimum Pulse Width for the Core Register
0.22 0.25 0.30 0.36
ns
tWPRE
Asynchronous Preset Minimum Pulse Width for the Core Register
0.22 0.25 0.30 0.36
ns
tCKMPWH
Clock Minimum Pulse Width HIGH for the Core Register
0.32 0.37 0.43 0.52
ns
tCKMPWL
Clock Minimum Pulse Width LOW for the Core Register
0.36 0.41 0.48 0.57
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
相關(guān)PDF資料
PDF描述
S-1172B27-E6T1U 2.7 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6
S-1172B27-U5T1U 2.7 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO5
S-1172B29-E6T1U 2.9 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6
S-1172B42-E6T1U 4.2 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6
S-1172B42-U5T1U 4.2 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO5
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S-1172B20-U5T1G 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1172B21-E6T1G 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1172B21-U5T1G 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1172B22-E6T1G 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR
S-1172B22-U5T1G 制造商:Seiko Instruments Inc (SII) 功能描述:LINEAR LDO REG HI 70UA IQ 1000MA IOUT