- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄219501 > S-1172B16-E6T1U 1.6 V FIXED POSITIVE LDO REGULATOR, 0.15 V DROPOUT, PDSO6 PDF資料下載
參數(shù)資料
| 型號： | S-1172B16-E6T1U |
| 元件分類： | 固定正電壓單路輸出LDO穩(wěn)壓器 |
| 英文描述： | 1.6 V FIXED POSITIVE LDO REGULATOR, 0.15 V DROPOUT, PDSO6 |
| 封裝： | HALOGEN FREE AND LEAD FREE, HSOP-6 |
| 文件頁數(shù)： | 1/34頁 |
| 文件大?。?/td> | 478K |
| 代理商： | S-1172B16-E6T1U |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁
ProASIC3 DC and Switching Characteristics
v1.3
2 - 83
Clock Conditioning Circuits
CCC Electrical Specifications
Timing Characteristics
Table 2-106 ProASIC3 CCC/PLL Specification
Parameter
Minimum
Typical
Maximum
Units
Clock Conditioning Circuitry Input Frequency fIN_CCC
1.5
350
MHz
Clock Conditioning Circuitry Output Frequency fOUT_CCC
0.75
350
MHz
Serial Clock (SCLK) for Dynamic PLL1
125
MHz
Delay Increments in Programmable Delay Blocks2, 3
200
ps
Number of Programmable Values in Each Programmable
Delay Block
32
Input Period Jitter
1.5
ns
CCC Output Peak-to-Peak Period Jitter FCCC_OUT
Max Peak-to-Peak Period Jitter
1 Global
Network
Used
3 Global
Networks
Used
0.75 MHz to 24 MHz
0.50%
0.70%
24 MHz to 100 MHz
1.00%
1.20%
100 MHz to 250 MHz
1.75%
2.00%
250 MHz to 350 MHz
2.50%
5.60%
Acquisition Time
(A3P250 and A3P1000 only)
LockControl = 0
300
s
LockControl = 1
300
s
(all other dies)
LockControl = 0
300
s
LockControl = 1
6.0
ms
Tracking Jitter 5
(A3P250 and A3P1000 only)
LockControl = 0
1.6
ns
LockControl = 1
1.6
ns
(all other dies)
LockControl = 0
1.6
ns
LockControl = 1
0.8
ns
Output Duty Cycle
48.5
51.5
%
Delay Range in Block: Programmable Delay 12, 3
0.6
5.56
ns
Delay Range in Block: Programmable Delay 22, 3
0.025
5.56
ns
Delay Range in Block: Fixed Delay2, 3
2.2
ns
Notes:
1. Maximum value obtained for a –2 speed-grade device in worst-case commercial conditions. For specific
junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
2. This delay is a function of voltage and temperature. See Table 2-6 on page 2-6 for deratings.
3. TJ = 25°C, VCC = 1.5 V
4. The A3P030 device does not contain a PLL.
5. Tracking jitter is defined as the variation in clock edge position of PLL outputs with reference to the PLL
input clock edge. Tracking jitter does not measure the variation in PLL output period, which is covered by
the period jitter parameter.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S-1172B16-U5T1U | 1.6 V FIXED POSITIVE LDO REGULATOR, 0.15 V DROPOUT, PDSO5 |
| S-1172B21-E6T1U | 2.1 V FIXED POSITIVE LDO REGULATOR, 0.15 V DROPOUT, PDSO6 |
| S-1172B2J-E6T1U | 2.85 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6 |
| S-1172B2J-U5T1U | 2.85 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO5 |
| S-1172B45-E6T1U | 4.5 V FIXED POSITIVE LDO REGULATOR, 0.1 V DROPOUT, PDSO6 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S-1172B16-U5T1G | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
| S-1172B17-E6T1G | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
| S-1172B17-U5T1G | 制造商:SII 制造商全稱:Seiko Instruments Inc 功能描述:HIGH RIPPLE-REJECTION LOW DROPOUT HIGH OUTPUT CURRENT CMOS VOLTAGE REGULATOR |
| S-1172B18-E6T1G | 功能描述:低壓差穩(wěn)壓器 - LDO Linear LDO reg Hi 70uA Iq 1000mA Iout RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負(fù)載調(diào)節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-20 |
| S-1172B18-E6T1U | 功能描述:IC REG LINEAR 1A 6HSOP 制造商:ablic u.s.a. inc. 系列:* 包裝:剪切帶（CT） 零件狀態(tài):在售 穩(wěn)壓器數(shù):1 電流 - 輸出:1A 工作溫度:-40°C ~ 85°C（TA） 安裝類型:表面貼裝 封裝/外殼:6-SOIC 變異型（0.154"，3.9mm），4 引線 + 2 個(gè)葉片 供應(yīng)商器件封裝:6-HSOP 標(biāo)準(zhǔn)包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。