參數(shù)資料
型號: S-1137D29-M5T1U
元件分類: 固定正電壓單路輸出LDO穩(wěn)壓器
英文描述: 2.9 V FIXED POSITIVE LDO REGULATOR, 0.31 V DROPOUT, PDSO5
封裝: HALOGEN AND LEAD FREE, SOT-23, 5 PIN
文件頁數(shù): 10/47頁
文件大?。?/td> 500K
代理商: S-1137D29-M5T1U
HIGH RIPPLE-REJECTION LOW DROPOUT SOFT-START FUNCTION CMOS VOLTAGE REGULATOR
S-1137 Series
Rev.2.0_01
Seiko Instruments Inc.
18
Operation
1.
Basic operation
Figure 16 shows the block diagram of S-1137 Series.
The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-divided by
feedback resistors Rs and Rf. It supplies the gate voltage necessary to maintain the constant output voltage which is
not influenced by the input voltage and temperature change, to the output transistor.
*1
*1.
Parasitic diode
VSS
Current
supply
+
Vfb
Vref
VIN
VOUT
Rf
Rs
Error
amplifier
Reference voltage
circuit
Figure 16
2.
Output transistor
In the S-1137 Series, a low on-resistance P-channel MOS FET is used as the output transistor.
Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to inverse
current flowing from the VOUT pin through a parasitic diode to the VIN pin.
相關(guān)PDF資料
PDF描述
S-1137D29-U5T1U 2.9 V FIXED POSITIVE LDO REGULATOR, 0.31 V DROPOUT, PDSO5
S-1137D35-I6T2U 3.5 V FIXED POSITIVE LDO REGULATOR, 0.31 V DROPOUT, PDSO6
S-1137D35-M5T1U 3.5 V FIXED POSITIVE LDO REGULATOR, 0.31 V DROPOUT, PDSO5
S-1137D35-U5T1U 3.5 V FIXED POSITIVE LDO REGULATOR, 0.31 V DROPOUT, PDSO5
S-1165B15MC-N6A-TF 5.5 V FIXED POSITIVE LDO REGULATOR, 0.3 V DROPOUT, PDSO5
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