- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378162 > RM5261A-250-H (PMC-SIERRA INC) RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary PDF資料下載
參數(shù)資料
| 型號： | RM5261A-250-H |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RM5261A⑩ Microprocessor with 64-Bit System Bus Data Sheet Preliminary |
| 中文描述： | 64-BIT, 250 MHz, MICROPROCESSOR, PQFP208 |
| 封裝： | HEAT SPREADER, MQFP-208 |
| 文件頁數(shù)： | 35/42頁 |
| 文件大?。?/td> | 683K |
| 代理商： | RM5261A-250-H |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002240, Issue 2
35
RM5261A Microprocessor with 64-Bit System Bus Data Sheet
Preliminary
9.3
System Interface Parameters
1
9.4
Boot-Time Interface Parameters
Parameter
1
Data Output
2,3
t
DO
Symbol Conditions
CPU Speed
250 MHz to 350 MHz
Min
1.0
Units
ns
Max
5.0
mode14..13 = 10
5,6
(fastest)
mode14..13 = 01
5,6
(slowest)
t
rise
= see above table
t
fall
= see above table
1.0
6.0
ns
Data Setup
4
t
DS6
t
DH
2.5
ns
Data Hold
4
Notes
1.
Timings are measured from 0.425 x VccIO
of clock to 0.425 x VccIO of signal for 3.3V I/O.
Timings are measured from 0.48 x VccIO of clock to 0.48
x
VccIO of signal for
2.5V I/O.
2.
Capacitive load for all maximum output timings is 50 pF. Minimum output timings are for
theoretical no load condition-untested.
3.
Data Output timing applies to all signal pins whether tristate I/O or output only.
4.
Setup and Hold parameters apply to all signal pins whether tristate I/O or input only.
5.
Only mode 14:13 = 10 is tested and guaranteed.
6.
Data shown is for 3.3 V I/O. For 2.5 V I/O derate all times by .5 nS.
1.0
ns
Parameter
Mode Data Setup
Symbol
t
DS
t
DH
Min
4
Max
Units
SysClock cycles
Mode Data Hold
0
SysClock cycles
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RM5261A-300-H | CONNECTOR ACCESSORY |
| RM5261A-300-HI | CONNECTOR ACCESSORY |
| RM5261A-350-H | CONNECTOR ACCESSORY |
| RM5261 | RM5261⑩ Microprocessor with 64-Bit System Bus Data Sheet Released |
| RM5261-200-Q | RM5261⑩ Microprocessor with 64-Bit System Bus Data Sheet Released |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RM5261A-300HI-B002 | 制造商:PMC Sierra from Components Direct 功能描述:MICROPROCESSOR 64-BIT 300MHZ 0.18UM TECHNOLOGY - Trays 制造商:PMC-Sierra 功能描述:PMC SIERRA RM5261A-300HI-B002, Microprocessor 64-Bit 300MHz 0.18um Technology 3.3V 208-Pin MQFP |
| RM5261A-300J-B002 | 制造商:PMC Sierra from Components Direct 功能描述:RM5261A-300J-B002, MICROPROCESSOR 64-BIT 300MHZ 0.18UM TECHN - Trays 制造商:PMC SIERRA 功能描述:PMC SIERRA RM5261A-300J-B002, Microprocessor 64-Bit 300MHz 0.18um Technology 3.3V 208-Pin LFMQFP |
| RM5270-150S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5270-200S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5271-200S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
發(fā)布緊急采購，3分鐘左右您將得到回復。