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參數(shù)資料
| 型號(hào)： | RF2486 |
| 廠商： | RF MICRO DEVICES INC |
| 元件分類： | 無(wú)繩電話/電話 |
| 英文描述： | PCS LOW NOISE AMPLIFIER/MIXER |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PDSO24 |
| 封裝： | SSOP-24 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大?。?/td> | 237K |
| 代理商： | RF2486 |
8-107
RF2486
Rev A7 010717
8
F
Pin
1
2
Function
NC
VCC1
Description
No connection. This pin may be grounded (recommended) or left open.
Interface Schematic
Supply voltage for the mixer and RF buffer amplifier. External RF
bypassing is required. The trace length between the pin and the bypass
capacitor should be minimized. The ground side of the bypass capaci-
tor should connect immediately to ground plane.
Supply voltage for the LNA. External RF bypassing is required. The
trace length between the pin and the bypass capacitor should be mini-
mized. The ground side of the bypass capacitor should connect imme-
diately to ground plane.
Ground connection for the LNA. For best performance, keep traces
physically short and connect immediately to ground plane.
RF input pin for the LNA. This pin is internally matched for minimum
noise figure (NOT for minimum VSWR), given a 50
source imped-
ance. This pin is not internally DC-blocked.
3
VCC2
4
GND1
5
LNA IN
6
7
GND2
GND3
Same as pin 4.
Ground connection for the RF buffer amplifier. For best performance,
keep traces physically short and connect immediately to ground plane.
No connection. This pin may be grounded (recommended) or left open.
8
9
NC
GND4
VCC3
Same as pin 7.
10
Supply voltage for both LO buffer amplifiers. External RF bypassing is
required. The trace length between the pin and the bypass capacitor
should be minimized. The ground side of the bypass capacitor should
connect immediately to ground plane.
Enable pin for the LO output buffer amplifier. This is a digitally con-
trolled input. A logic "high" (
≥
3.1V) turns the buffer amplifier on, and the
current consumption increases by 3mA (with -2dBm LO input). A logic
"low" (
≤
0.5V) turns the buffer amplifier off.
11
LO BUFF
EN
12
LO IN
Mixer LO input pin. This pin is internally DC-blocked and matched to
50
.
Optional buffered LO output. This pin is internally DC-blocked and
matched to 50
. The buffer amplifier is switched on or off by the volt-
age level at pin 11.
Ground connection for both LO buffer amplifiers. For best performance,
keep traces physically short and connect immediately to ground plane.
Open-collector IF output pin. This is a balanced output. The output
impedance is set by an internal 1000
resistor to pin 16. Thus the dif-
ferential IF output impedance is 1000
. The resistor sets the operating
impedance, but an external choke or matching inductor to V
CC
must be
supplied in order to bias this output. This inductor is typically incorpo-
rated in the matching network between the output and IF filter. Because
this pin is biased to V
CC
, a DC blocking capacitor must be used if the IF
filter input has a DC path to ground.
Same as pin 15, except complementary output.
13
LO BUFF
OUT
GND5
14
15
IF+
16
17
IF-
See pin 15.
GND6
Ground connection for the mixer. For best performance, keep traces
physically short and connect immediately to ground plane.
Mixer RF input pin. This pin is internally DC-blocked and matched to
50
.
Same as pin 17.
18
MIX RF IN
19
GND7
150
VCC1
VCC4
BIAS
LNA IN
7.5 k
LO BUFF EN
1 k
IF-
IF+
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