
Make A Precision
±
10V Reference
By R. Mark Stitt, (520) 746-7445
Many systems require the combination of both a positive and
a negative precision 10.0V reference. ADI offers several
hybrid
±
10V references. Although Burr-Brown offers no
±
10V reference at this time, we do have some simple two-
chip solutions which are accurate and can be more cost
effective. (The
lowest
cost grades of ADI’s
±
10V references
are priced at $37.25 (AD2702) and $42.10 (AD2712) each in
25+ quantities.)
Figure 1 shows one two-chip solution. It uses the super-
stable REF102 +10.0V precision reference and an INA105
difference amplifier connected as a precision unity gain
inverting amplifier. The REF102CM has 2.5ppm/
°
C max
drift. The INA105BM adds drift to the –10.0V output of
1ppm/
°
C max due to V
/dT and 5ppm/
°
C due to gain drift.
The V
error of the REF102CM is
±
2.5mV max. The
INA105BM adds
±
10mV max error to the –10.0V reference.
FIGURE 2. Precision Two-Chip
±
10V Reference with
±
V
OUT
Trim.
FIGURE 1. Precision Two-Chip
±
10.0V Reference.
Both of the V
errors are adjustable to zero as shown in
Figure 2. Because the adjustment range is small, instability
in the trim components is negligible. Since the +V
OUT
adjust-
ment affects –V
OUT
, adjust +V
OUT
first.
If you need a 1ppm/
°
C reference, use the REF101 as shown
in Figure 3. The REF101 contains the precision resistors
needed for the –10V inverter. For a
±
10.0V reference, the
only additional component needed is an op amp. The 0.6
μ
V/
°
C V
/dT of the OPA27AM adds a negligible 0.06ppm/
°
C
drift to the negative reference.
For lowest parts cost, consider the
±
10V reference shown in
Figure 4. The unity-gain-inverting amplifier in this circuit
uses 1% resistors and a 100
pot to trim the –10.0V
reference output. When using standard 1% film resistors, a –
V
OUT
drift of 50ppm/
°
C or more should be expected.
The REF101 and REF102 are buried-zener-based references.
They have better stability and much lower noise than stan-
dard band-gap-based voltage references. Still, there are in-
stances when even lower noise is required. The standard way
to lower noise is to lower the noise bandwidth at the output
of the reference by filtering (see Application Bulletin 3).
The circuit shown in Figure 5 includes noise reduction filters
on both the +10V and –10V reference outputs. The improved
filter design shown has several advantages:
1) low output impedance at high frequency for driving
dynamic loads,
2) improved noise filtering, and
3) ability to drive large capacitive loads.
+15V
2
10V
Out
Com
REF102
V+
6
4
2
3
1
25k
25k
25k
25k
INA105
5
6
+10V Out
–10V Out
2
10V
Out
Com
REF102
V+
6
4
2
3
1
25k
25k
25k
25k
INA105
5
6
+10V Out
–10V Out
20k
5
20
20
1k
10k
Trim
10k
+10V
Adj
–10V
Adj
+15V
Mailing Address: PO Box 11400 Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd. Tucson, AZ 85706
Tel: (520) 746-1111 Twx: 910-952-111 Telex: 066-6491 FAX (520) 889-1510 Immediate Product Info: (800) 548-6132
1990 Burr-Brown Corporation
AB-005
Printed in U.S.A. June, 1995