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參數(shù)資料
| 型號： | RDD104 |
| 廠商： | LSI Corporation |
| 英文描述： | SELECTABLE 4 DECADE CMOS DIVIDER |
| 中文描述： | 選擇4十年的CMOS分頻器 |
| 文件頁數(shù)： | 1/2頁 |
| 文件大?。?/td> | 25K |
| 代理商： | RDD104 |
SELECTABLE 4 DECADE CMOS DIVIDER
FEATURES:
Selectable Divide by 10 or 100 or 1,000 or 10,000
Clock Input Shaping Network Accepts Fast or Slow
Edge Inputs
Active Oscillator Network for External Crystal
Square Wave Output
Output TTL Compatible at +4.5 Volt Operation
High Noise Immunity
Reset
All Inputs Protected
+4.5V to +15V Operation (V
DD
-V
SS
)
Low Power Dissipaton
RDD104 (DIP); RDD104-S (SOIC) - See Figure 1
DC ELECTRICAL CHARACTERISTICS:
(All voltages referenced to Vss)
V
DD
-40°C
Quiescent Device Current 4.5V 10 10 300 uA Max
10V 20 20 600 uA Max
+25°C
+85°C UNIT
Output Voltage, Low Level 4.5V 0.01 0.01 0.05 V Min
10V 0.01 0.01 0.05 V Min
High Level 4.5V 4.49 4.49 4.45 V Max
10V 9.99 9.99 9.95 V Max
Input Noise Immunity 4.5V 1.3 1.3 1.3 V Min
(Low and High) 10V 3.0 3.0 3.0 V Min
Output Drive Current:
N-Channel Sink Current 4.5V 2.3 1.9 1.6 mA Min
(V
OUT
= Vss + 0.4V) 10V 5.0 4.0 3.5 mA Min
P-Channel Source Current 4.5V 1.1 0.95 0.8 mA Min
(V
OUT
= V
DD
- 1V) 10V 2.5 2.1 1.8 mA Min
Input Capacitance (any input) 5.0 pF Max
DESCRIPTION OF OPERATION:
The RDD104 is a monolithic CMOS four decade
divider circuit that advances on each negative
transition of the input clock pulse. When the reset
input is high the circuit is cleared to zero. The
clock input is applied to a three stage inverting
amplifier network whose output is brought out so
that an external crystal network can be used to
form an oscillator circuit. If the clock output is not
used,the amplifier acts as an input buffer. Two
select inputs are provided which enables the circuit
to divide by 10, 100, 1,000 or 10,000.
The Output Division is selected according to the
following truth table:
DIVIDER SELECT INPUTS: OUTPUT
SELECT 2 SELECT 1 DIVISION
0 0 10,000
0 1 1,000
1 0 100
1 1 10
MAXIMUM RATINGS:
PARAMETER SYMBOL VALUE UNIT
Storage Temperature
T
STG
Operating Temperature
T
A
DC Supply Voltage
(V
DD
- V
SS
)
Voltage at any input V
IN
V
SS
- 0.5 to V
DD
+ 0.5 V
-65 to +150
-40 to +85
+18
°C
°C
V
January 2000
PIN ASSIGNMENT
- TOP VIEW
1
2
3
4
5
6
7
8
L
FIGURE 1
V
DD
(+V)
OUTPUT
CLOCK OUTPUT
CLOCK INPUT
DIVIDER
SELECT-1
DIVIDER
SELECT-2
V
SS
(-V)
RESET
R
The information included herein is believed to be
accurate and reliable. However, LSI Computer Systems,
Inc. assumes no responsibilities for inaccuracies, nor for
any infringements of patent rights of others which may
result from its use.
RDD104-092491
LSI/CSI
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405
A3800
RDD 104
UL
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