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參數(shù)資料
| 型號： | RDC-19224-A03 |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 位置變換器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, PQFP44 |
| 封裝： | PLASTIC, MQFP-44 |
| 文件頁數(shù)： | 20/24頁 |
| 文件大?。?/td> | 1233K |
| 代理商： | RDC-19224-A03 |
5
Data Device Corporation
www.ddc-web.com
RDC-19220 SERIES
V-12/08-0
ERROR PROCESSOR
RESOLVER
INPUT
(
θ)
VELOCITY
OUT
DIGITAL
POSITION
OUT (
φ)
VCO
CT
S
A
+ 1
1 B
S
+ 1
10B
H = 1
+
-
e
A2
S
-12
db/oct
B
A
2A
-6 db/oct
10B
ω (rad/sec)
2A
2 2 A
ω (rad/sec)
f
= BW (Hz) =
BW
2 A
π
CLOSED LOOP
(B = A/2)
GAIN = 0.4
GAIN = 4
(CRITICALLY DAMPED)
OPEN LOOP
FIGURE 3. TRANsFER FUNcTION
BLOcK dIAGRAM #2
FIGURE 4. BOdE PLOTs
integrated yielding a velocity voltage which in turn drives a volt-
age controlled oscillator (VCO). This VCO is an incremental
integrator (constant voltage input to position rate output) which
together with the velocity integrator forms a type II servo feed-
back loop. A lead in the frequency response is introduced to
stabilize the loop and another lag at higher frequency is intro-
duced to reduce the gain and ripple at the carrier frequency and
above. The settings of the various error processor gains and
break frequencies are done with external resistors and capaci-
tors so that the converter loop dynamics can be easily controlled
by the user.
TRANSFER FuNCTION AND BODE PLOT
The dynamic performance of the converter can be determined
from its Transfer Function Block Diagrams and its Bode Plots (open
and closed loop). These are shown in FIguRES 2, 3, and 4.
The open loop transfer function is as follows:
2
S
A
+1
( )
B
2
S
+1
(
)
10B
Open Loop Transfer Function =
where A is the gain coefficient and A2= A1A2
and B is the frequency of lead compensation.
The components of gain coefficient are error gradient, integrator
gain and VCO gain. These can be broken down as follows:
- Error Gradient = 0.011 volts per LSB (CT + Error Amp + Demod
with 2 Vrms input)
- Integrator Gain =
volts per second per volt
- VCO Gain =
LSBs per second per volt
where: Cs = 10 pF
Fs = 67 kHz when Rs = 30 k
Fs = 100 kHz when Rs = 20 k
Fs = 134 kHz when Rs = 15 k
CVCO = 50 pF
Cs Fs
1.1 CBW
1
1.25 RV CVCO
RV, RB, and CBW are selected by the user to set velocity scaling
and bandwidth.
gENERAL SETuP CONSIDERATIONS
Note: For detailed application and technical information see the RD/
RDC converter applications manual which is available for download from
the DDC web site @ www.ddc-web.com.
DDC has external component selection software which consid-
ers all the criteria below, and in a simple fashion, asks the key
parameters (carrier frequency, resolution, bandwidth, and track-
ing rate) to derive the external component value.
The following recommendations should be considered when
installing the RDC-19220 Series R/D converters:
1) In setting the bandwidth (BW) and Tracking Rate (TR) (select-
ing five external components), the system requirements need
to be considered. For greatest noise immunity, select the
minimum BW and TR the system will allow.
2) +5 and -5 volt operation:
Power supplies are ±5 V dc. For lowest noise performance it
is recommended that a 0.1 F or larger cap be connected
from each supply to ground near the converter package.
When using a +5V and -5V supply to power the converter,
RDC-19222 pins 22, 23, 25, 26 must be no connection, and
on RDC-19224 pins 20, 17, 16, 19, must be no connection.
Also, the 10uF cap is not connected to +cap and -cap pins.
3) This converter has 2 internal ground planes, which reduce
noise to the analog input due to digital ground currents. The
resolver inputs and velocity output are referenced to AgND.
The digital outputs and inputs are referenced to gND. The
AgND and gND pins must be tied together as close to the
converter package as possible. Not shorting these pins
together as close to the converter package as possible will
cause unstable converter results.
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