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參數(shù)資料
| 型號(hào)： | RD74LVC16374BTEL |
| 元件分類(lèi)： | 總線收發(fā)器 |
| 英文描述： | LVC/LCX/Z SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 6.10 X 12.50 MM, 0.50 MM PITCH, PLASTIC, TSSOP-48 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 80K |
| 代理商： | RD74LVC16374BTEL |
Rev.1.00 Jan. 24, 2005 page 1 of 8
RD74LVC16374B
16-bit D-type Flip Flops with 3-state Outputs
REJ03D0501–0100
Rev.1.00
Jan. 24, 2005
Description
The RD74LVC16374B has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at
the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock
input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high
again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless
of what signals are present at the other inputs and the state of the storage elements. Low voltage and high-speed
operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the
life of a battery for long time operation.
Features
V
CC = 1.65 V to 5.5 V
All inputs V
IH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs V
OUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
Typical V
OL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical V
OH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current
±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±12 mA (@VCC = 2.7 V)
±24 mA (@VCC = 3.0 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
RD74LVC16374BTEL
TSSOP–48 pin
PTSP0048KA–A
(TTP–48DBV)
T
EL (1,000 pcs/reel)
Function Table
Inputs
G
CK
D
Output Q
H
X
Z
L
↑
L
↑
H
L
X
Q0
H:
High level
L:
Low level
X:
Immaterial
Z:
High impedance
↑:
Low to high transition
Q0:
Level of Q before the indicated steady input conditions were established.
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