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參數(shù)資料
| 型號(hào)： | RC7101 |
| 英文描述： | Eighteen Distributed-Output Clock Driver |
| 中文描述： | 18分布式輸出時(shí)鐘驅(qū)動(dòng)器 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 64K |
| 代理商： | RC7101 |
RC7101
PRODUCT SPECIFICATION
4
A
Switching Characteristics
Parameter
T
PD
, Propagation delay
T
R
, Rise time
T
F
, Fall time
T
D
, Duty cycle
T
EN
, Output enable time
T
DIS
, Output disable time
T
SK
, Skew
Z
O
, Output impedance
Conditions
V
T
= 1.5V
0.4 to 2.4V
2.4 to 0.4V
V
T
= 1.5V
V
T
= 1.5V
V
T
= 1.5V
V
T
= 1.5V
Min.
1
0.5
0.5
45
1
1
Typ.
Max.
5
1.5
1.5
55
8
8
250
Units
ns
ns
ns
%
ns
ns
ps
15
Serial Data Interface
Signaling Requirements for the I
2
C Serial Port
To initiate communications with the serial port, a start bit is
invoked. The start bit is defined as the SDATA line is brought
low while the SCLOCK is held high. Once the start bit is ini-
tiated, valid data can then be sent. Data is considered to be
valid when the clock goes to and remains in the high state.
The data can change when the clock goes low. To terminate
the transmission, a stop bit is invoked. The stop bit occurs
when the SDATA line goes from a low to a high state while
the SCLOCK is held high. See Figure below.
Start Bit
Data Valid
Change Data
Stop Bit
SCLOCK
SDATA
The data transfer rate is 100kbits/s in the standard mode and
400kbits/s in the fast mode. The serial protocol uses block
writes only. Bytes are written with the lowest first and the
highest last with the ability to stop after any complete byte
has been transferred. The clock driver is a slave/receiver only
and is only capable of receiving data with the exception of
sending acknowledgements. It is not capable of sending data.
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