36
7530J–AVR–03/12
Atmel ATmega48/88/168 Automotive
7.
Power Management and Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
Table 7-1 for a summary. If an enabled interrupt occurs
while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in
addition to the start-up time, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. The contents of the Register File and SRAM are unaltered when
the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up and
executes from the Reset Vector.
distribution. The figure is helpful in selecting an appropriate sleep mode.
7.0.1
Sleep Mode Control Register – SMCR
The Sleep Mode Control Register contains control bits for power management.
Bits 7..4 Res: Reserved Bits
These bits are unused bits in the ATmega48/88/168, and will always read as zero.
Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 7-1.
11
01
Reserved
11
10
Reserved
11
Reserved
Table 6-14.
Clock Prescaler Select
CLKPS3
CLKPS2
CLKPS1
CLKPS0
Clock Division Factor
Bit
76543210
––––
SM2
SM1
SM0
SE
SMCR
Read/Write
RRRR
R/W
Initial Value
00000000
Table 7-1.
Sleep Mode Select
SM2
SM1
SM0
Sleep Mode
000
Idle
0
1
ADC Noise Reduction
010
Power-down
011
Power-save
100
Reserved