參數(shù)資料
型號: R5F6452NLFD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù): 19/42頁
文件大小: 937K
代理商: R5F6452NLFD
Rev.2.00
Jan 30, 2006
Page 24 of 37
REJ03B0102-0200
R8C/14 Group, R8C/15 Group
5. Electrical Characteristics
NOTES:
1.
This condition is not applicable when using with Vcc
≥ 1.0V.
2.
When turning power on after the time to hold the external power below effective voltage (Vpor1) exceeds10s, refer to Table
3.
tw(por2) is time to hold the external power below effective voltage (Vpor2).
NOTES:
1.
When not using the voltage monitor 1 reset, use with Vcc
≥ 2.7V.
2.
tw(por1) is time to hold the external power below effective voltage (Vpor1).
Figure 5.3
Reset Circuit Electrical Characteristics
Table 5.8
Reset Circuit Electrical Characteristics (When Using Voltage Monitor 1 Reset )
Symbol
Parameter
Condition
Standard
Unit
Min.
Typ.
Max.
Vpor2
Power-On Reset Valid Voltage
-20
°C ≤ Topr < 85°C
Vdet1
V
tw(Vpor2-Vdet1) Supply Voltage Rising Time When Power-On Reset is
Deasserted(1)
-20
°C ≤ Topr < 85°C,
tw(por2)
≥ 0s(3)
100
ms
Table 5.9
Reset Circuit Electrical Characteristics (When Not Using Voltage Monitor 1 Reset)
Symbol
Parameter
Condition
Standard
Unit
Min.
Typ.
Max.
Vpor1
Power-On Reset Valid Voltage
-20
°C ≤ Topr < 85°C
0.1
V
tw(Vpor1-Vdet1)
Supply Voltage Rising Time When Power-On Reset is
Deasserted
0
°C ≤ Topr ≤ 85°C,
tw(por1)
≥ 10s(2)
100
ms
tw(Vpor1-Vdet1)
Supply Voltage Rising Time When Power-On Reset is
Deasserted
-20
°C ≤ Topr < 0°C,
tw(por1)
≥ 30s(2)
100
ms
tw(Vpor1-Vdet1)
Supply Voltage Rising Time When Power-On Reset is
Deasserted
-20
°C ≤ Topr < 0°C,
tw(por1)
≥ 10s(2)
1ms
tw(Vpor1-Vdet1)
Supply Voltage Rising Time When Power-On Reset is
Deasserted
0
°C ≤ Topr ≤ 85°C,
tw(por1)
≥ 1s(2)
0.5
ms
NOTES:
1. Hold the voltage of the microcomputer operation voltage range (Vccmin or above) within sampling time.
2. A sampling clock can be selected. Refer to 6. Voltage Detection Circuit of Hardware Manual for details.
3. Vdet1 indicates the voltage detection level of the voltage detection 1 circuit. Refer to 6. Voltage Detection Circuit of
Hardware Manual for details.
Vdet1(3)
Vpor1
Internal Reset
Signal
(“L” Valid)
tw(por1)
tw(Vpor1–Vdet1)
Sampling Time(1, 2)
Vdet1(3)
1
fRING-S
× 32
1
fRING-S
× 32
Vpor2
Vccmin
tw(por2) tw(Vpor2–Vdet1)
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