參數(shù)資料
型號： R5F6451NJFD
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP144
封裝： 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù)： 11/81頁
文件大?。?/td> 885K
代理商： R5F6451NJFD
REJ03B0230-0030 Rev.0.30 Feb 14, 2008
Page 19 of 79
Under development
Preliminary Specification
Specifications in this preliminary version are subject to change.
R32C/151 Group
3. Memory
3.
Memory
Figure 3.1 shows a memory mapping of the R32C/151 Group.
The R32C/151 Group provides 4-Gbyte address space from 00000000h to FFFFFFFFh.
The internal ROM is allocated from address FFFFFFFFh to lower. For example, a 1-Mbyte internal ROM is
addressed from FFF00000h to FFFFFFFFh.
The fixed interrupt vectors are allocated from address FFFFFFDCh to FFFFFFFFh in which the starting
address of each interrupt handler is stored.
The internal RAM is allocated from address 00000400h to higher. For example, a 48-Kbyte internal RAM is
addressed from 00000400h to 0000C3FFh. Besides being used for data storage, the internal RAM functions
as stack(s) for a subroutine and/or an interrupt handler.
Special Function Registers (SFR), consisting of control registers for peripheral functions, are allocated from
address 00000000h to 000003FFh and from 00040000h to 0004FFFFh. Any blank spaces within the SFR
are reserved. No access is allowed.
Figure 3.1
Memory Mapping
Internal RAM
SFR1
SFR2
Internal ROM
00000000h
FFFFFFFFh
Reset
NMI
Reserved
Watchdog timer (2)
Reserved
BRK instruction
Overflow
Undefined instruction
FFFFFFFFh
FFFFFFDCh
Notes:
1. Additional two 4-Kbyte spaces (blocks A and B) for storing data are provided in the flash memory version.
2. The watchdog timer interrupt shares the vector table with the oscillation stop detection interrupt and low-
voltage detection interrupt.
YYYYYYYYh
00000400h
0000C400h
Reserved
00040000h
Internal ROM
(Data space) (1)
00060000h
00062000h
Reserved
00050000h
Reserved
Internal ROM
Capacity
YYYYYYYYh
768 K bytes
FFF40000h
1 M byte
FFF00000h
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