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參數(shù)資料
| 型號(hào)： | R5F64201KFB |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 64 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 73/103頁(yè) |
| 文件大小： | 1017K |
| 代理商： | R5F64201KFB |
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REJ03B0236-0110 Rev.1.10 Mar 02, 2010
Page 69 of 97
R32C/120 Group
5. Electrical Characteristics
Notes:
1.
This value is the deviation from target frequency.
2.
This value is applicable only when the main clock oscillation is stable.
3.
This value is the time until the PLF1 bit in the PLS register becomes 1.
Table 5.11
Electrical Characteristics of Voltage Regulator for Internal Logic
(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)
Symbol
Characteristics
Measurement
condition
Value
Unit
Min.
Typ.
Max.
VVDC1
Output voltage
1.5
V
Table 5.12
Electrical Characteristics of Low Voltage Detector
(VCC = 4.2 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)
Symbol
Characteristics
Measurement
condition
Value
Unit
Min.
Typ.
Max.
Vdet
Detected voltage error
±0.2
V
Vdet(R)-Vdet(F) Hysteresis width
0
V
—
Self-consuming current
VCC = 5.0 V, low voltage
detector enabled
4A
td(E-A)
Operation start time of low voltage detector
150
s
Table 5.13
Electrical Characteristics of Oscillator
(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)
Symbol
Characteristics
Measurement
condition
Value
Unit
Min.
Typ.
Max.
fSO(PLL)
PLL clock self-oscillation frequency
35
50
80
MHz
|
f
LOCK|
Lock detection (1)
2%
|
f
UNLOCK|
Unlock detection (1)
2%
tLOCK(PLL)
PLL lock time (2, 3)
f(XRef) =4MHz
1ms
tjitter(p-p)
PLL jitter period (p-p)
2.0
ns
f(OCO)
On-chip oscillator frequency
94
125
156
kHz
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| R5F64201LFB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
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| R5F64206KFB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
| R5F64206LFB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:RENESAS MCU |
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