參數(shù)資料
型號: R5F64185HPFB
元件分類: 微控制器/微處理器
英文描述: 64-BIT, FLASH, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 118/126頁
文件大?。?/td> 899K
代理商: R5F64185HPFB
REJ03B0255-0110
Rev.1.10
Page 91 of 123
Jun 23, 2010
R32C/118 Group
5. Electrical Characteristics
Timing Requirements (VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta = Topr, unless otherwise noted)
Figure 5.5
Flash Memory CPU Rewrite Mode Timing
Table 5.14
Flash Memory CPU Rewrite Mode Timing
Symbol
Characteristics
Value
Unit
Min.
Max.
tcR
Read cycle time
200
ns
tsu(S-R)
Chip-select setup time for read
200
ns
th(R-S)
Chip-select hold time after read
0ns
tsu(A-R)
Address setup time for read
200
ns
th(R-A)
Address hold time after read
0ns
tw(R)
Read pulse width
100
ns
tcW
Write cycle time
200
ns
tsu(S-W)
Chip-select setup time for write
0ns
th(W-S)
Chip-select hold time after write
30
ns
tsu(A-W)
Address setup time for write
0ns
th(W-A)
Address hold time after write
30
ns
tw(W)
Write pulse width
50
ns
Chip select
Address
RD
t h(R-S)
Read cycle
t w(R)
t su(S-R)
t h(R-A)
t su(A-R)
Write cycle
Chip select
Address
WR
t h(W-S)
t w(W)
t su(S-W)
t h(W-A)
t su(A-W)
t cW
t cR
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