參數(shù)資料
型號(hào): R5F6417AHDFB
元件分類: 微控制器/微處理器
英文描述: 64-BIT, FLASH, MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁(yè)數(shù): 27/114頁(yè)
文件大?。?/td> 851K
代理商: R5F6417AHDFB
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REJ03B0254-0110
Rev.1.10
Page 2 of 111
Jun 23, 2010
R32C/117 Group
1. Overview
1.1.2
Performance Overview
Table 1.1 to Table 1.4 show the performance overview of the R32C/117 Group.
Note:
1.
Please contact a Renesas Electronics sales office to use the optional feature.
Table 1.1
R32C/117 Group Performance for the 144 pin-Package (1/2)
Unit
Function
Performance
CPU
Central
processing unit
R32C/100 Series CPU Core
Basic instructions: 108
Minimum instruction execution time: 15.625 ns (f(CPU) = 64 MHz)
Multiplier: 32-bit × 32-bit
64-bit
Multiply-accumulate unit: 32-bit × 32-bit + 64-bit
64-bit
IEEE-754 floating point standard: Single precision
32-bit barrel shifter
Operating mode: Single-chip mode, memory expansion mode,
microprocessor mode (optional (1))
Memory
Flash memory: 384 Kbytes to 1 Mbyte
RAM: 40 K/48 K/63 Kbytes
Data flash: 4 Kbytes × 2 blocks
Refer to Table 1.5 for memory size of each product group
Voltage
Detector
Low voltage
detector
Optional (1)
Low voltage detection interrupt
Clock
Clock generator
4 circuits (main clock, sub clock, PLL, on-chip oscillator)
Oscillation stop detector: Main clock oscillator stop/re-oscillation
detection
Frequency divide circuit: Divide-by-2 to divide-by-24 selectable
Low power modes: Wait mode, stop mode
External Bus
Expansion
Bus and memory
expansion
Address space: 4 Gbytes (of which up to 64 Mbytes is user
accessible)
External bus Interface: Support for wait-state insertion, 4 chip select
outputs
Bus format: Separate bus/Multiplexed bus selectable, data bus width
selectable (8/16/32 bits)
Interrupts
Interrupt vectors: 261
External interrupt inputs:
NMI, INT × 9, key input × 4
Interrupt priority levels: 7 levels
Watchdog Timer
15 bits × 1 (selectable input frequency from prescaler output)
DMA
DMAC
4 channels
Cycle-steal transfer mode
Request sources: 57
2 transfer modes: Single transfer, repeat transfer
DMAC II
Can be activated by any peripheral interrupt source
3 transfer functions: Immediate data transfer, calculation transfer,
chained transfer
I/O Ports
Programmable
I/O ports
2 input-only ports
120 CMOS inputs/outputs
32 ports are 5 V tolerant
A pull-up resistor is selectable for every 4 input ports (except 5 V
tolerant inputs)
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