參數(shù)資料
型號: R5F5630BDDFB
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數(shù): 145/337頁
文件大?。?/td> 14635K
代理商: R5F5630BDDFB
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R01UH0040EJ0100 Rev.1.00
Page 229 of 1657
Sep 8, 2011
RX630 Group
8. Voltage Detection Circuit (LVD)
8.6
Interrupt and Reset from Voltage Monitor 2
Table 8.4 shows the procedures for setting bits related to the voltage monitor 2 interrupt and voltage monitor 2 reset so
that voltage monitoring operates.Table 8.5 shows the procedure for setting bits related to the voltage monitor 2 interrupt
and voltage monitor 2 reset so that voltage monitoring stops. Figure 8.6 shows an example of operations for a voltage
monitor 2 interrupt. For the operation of the voltage monitor 2 reset, see Figure 6.2 in section 6, Resets.
Furthermore, set the LVD2CR0.LVD2DFDIS bit to 1 (disabling the digital filter) if you intend to use the voltage monitor
2 circuit in software standby or deep software standby mode.
Note 1. Steps 1, 3, and 11 are not required if operation is with the setting to select the voltage monitor 2 interrupt (LVD2CR0.LVD2RI =
0) and operation can be restarted by simply changing the settings of the LVD2CR0.LVD2FSAMP[1:0] and LVD2DFDIS bits or of
the LVD2CR1.LVD2IDTSEL[1:0] bits, or if restarting is in a case where the settings related to the voltage-detection circuit were
not changed after monitoring was stopped. When changes are to be made and operation is with the setting to select the voltage
monitor 2 reset (LVD2CR0.LVD2RI = 1), proceed through all steps from 1 to 11.
Note 2. Executing steps 2 and 3 at the same time (with a single instruction) creates no problems.
Note 1. Steps 1 and 2 are not required when operation is with the setting to select the voltage monitor 2 interrupt (LVD2CR0.LVD2RI =
0) and, after it is stopped, operation is to be restarted by simply changing the settings of the LVD2CR0.LVD2FSAMP[1:0] and
LVD2DFDIS bits or the LVD2CR1.LVD2IDTSEL[1:0] bits, or when restarting is in a case where the settings related to the
voltage-detection circuit were not changed after monitoring was stopped. When changes are to be made and operation is with
the setting to select the voltage monitor 2 reset (LVD1CR0.LVD1RI = 1), proceed through all steps from 1 to 5.
Table 8.4
Procedures for Setting Bits Related to the Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset
so that Voltage Monitoring Operates
Step
When the Digital Filter is in Use
When the Digital Filter is Not in Use
Voltage Monitor 2 Interrupt
Voltage Monitor 2 Reset
Voltage Monitor 2 Interrupt
Voltage Monitor 2 Reset
Specify the detection voltage by setting the LVDLVLR.LVD2LVL[3:0] bits.
Select the sampling clock for the digital filter by setting the
LVD2CR0.LVD2FSAMP[1:0] bits.
Set the LVD2CR0.LVD2DFDIS bit to 1 (disabling the digital
filter).
3
Clear the LVD2CR0.LVD2RI
bit to 0 (selecting the voltage
monitor 2 interrupt).
Set the LVD2CR0.LVD2RI
bit to 1 (selecting the
voltage monitor 2 reset).
Select the type of reset
negation by setting the
LVD2CR0.LVD2RN bit.
Clear the LVD2CR0.LVD2RI
bit to 0 (selecting the voltage
monitor 2 interrupt).
Set the LVD2CR0.LVD2RI
bit to 1 (selecting the
voltage monitor 2 reset).
Select the type of the reset
negation by setting the
LVD2CR0.LVD2RN bit.
4
Select the timing of interrupt
requests by setting the
LVD2CR1.LVD2IDTSEL[1:0]
bits.
Select the timing of interrupt
requests by setting the
LVD2CR1.LVD2IDTSEL[1:0]
bits.
5
Set the LVD2CR0.LVD2CMPE bit to 1 (enabling output of the results of comparison by voltage monitor 2).
6
Wait for at least one cycle of the LOCO.
7
Clear the LVD2CR0.LVD2DFDIS bit to 0 (enabling the digital filter).
8
Wait for at least 2n + 3 cycles of the LOCO (where n = 1, 2, 4,
8, and the sampling clock for the digital filter is the LOCO
frequency-divided by n).
— (waiting is not required)
9
Clear the LVD2SR.LVD2DET
flag to 0.
Clear the LVD2SR.LVD2DET
flag to 0.
10
Set the LVD2CR0.LVD2RIE bit to 1 (enabling the voltage monitor 2 interrupt or reset).
Set the LVCMPCR.LVD2E bit to 1 (enabling the voltage detection 2 circuit).
Table 8.5
Procedures for Setting Bits Related to the Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset
to Stop Voltage Monitoring
Step
Setting Bits Related to the Voltage Monitor 2 Interrupt and Voltage Monitor 2 Reset to Stop Voltage Monitoring
Clear the LVCMPCR.LVD2E bit to 0 (disabling the voltage detection 2 circuit).
Wait for at least one cycle of the LOCO.
3
Clear the LVD2CR0.LVD2RIE bit to 0 (disabling the voltage monitor 2 interrupt or reset).
4
Clear the LVD2CR0.LVD2CMPE bit to 0 (disabling output of the results of comparison by voltage monitor 2).
5
Modify settings of bits related to the voltage detection circuit other than the LVCMPCR.LVD2E, LVD2CR0.LVD2CMPE, and LVD2RIE bits.
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